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Software and hardware combined command relative controlling method based on logic transmitting rank

A technology of launch sequence number and instruction control, applied in the field of microprocessor design, can solve the problems of not guaranteeing the correlation of multiple instruction groups, reducing design complexity and implementation cost, danger detection logic, etc., to reduce design overhead and hardware Complexity, the effect of reducing complexity

Inactive Publication Date: 2008-12-17
NAT UNIV OF DEFENSE TECH
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the compiler in the EPIC structure does not guarantee the correlation between multiple instruction groups, and the Itanium series microprocessor hardware still needs related dangerous detection logic
Therefore, this method can only reduce the design complexity and implementation cost to a certain extent

Method used

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  • Software and hardware combined command relative controlling method based on logic transmitting rank
  • Software and hardware combined command relative controlling method based on logic transmitting rank

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Embodiment Construction

[0022] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0023] like figure 1 Shown, a kind of software-hardware combination command correlation control method based on logic launch serial number of the present invention, its steps are:

[0024] (1), compiling: the compiler generates instruction opcode OP(I), logical launch sequence number LIN(I) and d correlation vectors between instruction I and the previous w-1 instructions for any instruction I, and generates operations Vector VOP(I)={OP(I), LIN(I), DepV 0 (I), DepV 1 (I),..., DepV (d-1) (I)}; match with the information produced by the compiler, the structure of the item k of the instruction queue IQ is: IQ_Item(k)={OP(k), LIN(k), IQ_DepV 0 (k), IQ_DepV 1 (k),...,IQ_DepV (d-1) (k)}; At the same time, the microprocessor hardware provides a w-bit instruction queue IQ to occupy the state vector register MaskInIQ, which represents all...

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Abstract

The invention discloses a method for relate-controlling software and hardware combination based on directives of a public logic launch serial number, which includes following steps: (a) Compiling : a compiler compiles operation codes of instruction, logic launch serial number, and d of related vector between the instruction I and instruction w-1 for instruction I to achieve operation vector. (b) Inserting a command queue: the instruction controlling system need to ensure there is no instruction with the same logic launch serial number in the instruction queue IQ before inserting process. (c) Relate-controlling: an instruction controlling system for microprocessor hardware generates relate risk controlling signals with relate risk vector of the current queue, without further detection and decoding about the operation code of instruction. (4) Relate-maintenance.

Description

technical field [0001] The invention mainly relates to the field of microprocessor design, in particular to a software-hardware combination command correlation control method based on logical launch numbers. Background technique [0002] In a microprocessor, the instruction control system is responsible for controlling the execution behavior of instructions, and one of the very important control behaviors is instruction dependency control. Modern microprocessors usually use superscalar / super-pipeline technology to improve parallelism. Instructions are executed out of order at different stations in multiple execution pipelines at the same time, which makes the correlation control between instructions very complicated. [0003] Instructions with dependencies executing concurrently in the pipeline can lead to dependency hazards. When instructions with read-after-write (RAW) dependency hazards, write-after-write (WAW) dependency hazards, read-after-write (WAR) dependency hazard...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/45
Inventor 蒋江高军杨学军张民选邢座程阳柳曾献君马驰远李勇陈海燕李晋文衣晓飞张明穆长富倪晓强唐遇星张承义
Owner NAT UNIV OF DEFENSE TECH
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