System and method for transmitting and utilizing electronic program guide information

Abstract

Television schedule information transmission and utilization systems (50A-50D) transmit TV schedule data and associated network control messages provided by computer (54) as packets via the Video Blanking Interval (VBI) lines in the TV signal from various television program providers (51). This data is acquired by regional data processing systems and forwarded by the regional data processing systems to subscriber units (52) and used to construct an internal database. This intern database can be accessed by the subscriber unit (52) to display a TV schedule for the channels that are received by the user's TV.

Description

1. Field of the InventionThe present invention relates generally to a system and method for broadcasting, receiving and using television schedule information. More particularly, it relates to such a system and method in which the television schedule information is broadcast in, e.g., the vertical blanking interval (VBI) of a television broadcast, a schedule of television programs for a user's broadcast area or cable system is compiled from the broadcast, and the schedule is displayed on the user's television set for interactive use. As used herein, the term "broadcast" is used in a broad sense to include such transmission modes as cable and telephonic transmission.2. Description of the Prior ArtIt is known in the art to provide an interactive television program schedule system utilizing broadcast schedule information. For example, such a schedule system is disclosed in commonly assigned Young, U.S. Pat. No. 4,706,121, issued Nov. 10, 1987 and the above referenced Young et al. pendin...

AI Technical Summary

Benefits of technology

There are two base registers so that Memory Block Moves can be performed quickly. It would be very slow and cumbersome to the software if the value of the DPTR had to be changed for each read and then changed again before a write during block moves. The dual Base Registers allow you to put the starting address of the Read (Source) Block into the Read Base Register, and the starting address of the Write (Destination) block into the Write Base Register. A software loop can then be written that does a read followed by a write to the same DPTR address. The DPTR is then incremented and the process repeated. This allows software to quickly move blocks of Data anywhere in external RAM.

Problems solved by technology

If the latch is `0`, then it should be assumed that the voltage dropped below the PSRAM minimum data retention specification and all RAM data is invalid.

By requiring all of these conditions, it is hoped that the latch will not be able to be set by spurious noise glitches at power up.

If either of these signals is missing or poor, then the TPU will not be able to create a stable overlay.

Any jitter on Burst Gate will cause an annoying side to side motion on the overlay.

This causes an interrupt in the microprocessor which will initiate power down subroutines.

Note that transmission errors can cause missing messages and commands can therefore be received out of order.

Ignoring unneeded Show lists may help a Subscriber Unit's data processing throughput, since decryption is time consuming.

There may also be records which are not currently effective, either because the date they become effective is in the future, or because the date on which they ceased to be effective is in the past.

Note: due to the delay inherent in processing this type information, it is not a good idea to reuse this RG number to identify a new RG.

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