Digital data processing device and method for managing cache data

Abstract

A computer system cache memory contains at least two levels. A lower level selective victim cache receives cache lines evicted from a higher level cache. A selection mechanism selects lines evicted from the higher level cache for storage in the victim cache, only some of the evicted lines being selected for the victim. Preferably, two priority bits associated with each cache line are used to select lines for the victim. The priority bits indicate whether the line has been re-referenced while in the higher level cache, and whether it has been reloaded after eviction from the higher level cache.

Description

technical field [0001] The present invention relates to digital data processing hardware, and in particular to the design and operation of cache memory and supporting hardware for processing units of digital data processing devices. Background technique [0002] In the second half of the 20th century, a phenomenon known as the information revolution began. Although the information revolution is a historical development wider in scope than any single event or machine in history, no single device represents the information revolution more than the digital electronic computer. The development of computer systems is truly a revolution. Every year, computer systems become faster, store more data, and provide more applications to their users. [0003] Modern computer systems typically include a central processing unit (CPU) and the supporting hardware necessary to store, retrieve and communicate information, such as communication buses and memory. A modern computer system also ...

AI Technical Summary

Problems solved by technology

[0012] Although traditional techniques for designing cache hierarchies and selecting cache contents have had limited success, it can be seen that in many environments the processor spends a significant amount of its time idling on cache misses

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