Clock phase detecting device and method

Abstract

This invention discloses a clock phase-discriminating device and a method for testing the phase difference of a primary signal and a tested signal, in which, the phase signals to be tested expressing the phase difference between the primary signal and the tested signal should be got and the phase-discriminating clock signal numbers contained in the width of the phase signal te be tested should be accumulated to carry out symmetric integration to the continued phase-discriminating clock signals to get numeric quantity integration result of phase-discriminating clock signals and their phase values then to compute the phase width of the phase signal to be tested, which can increase the accuracy for clock phase-discrimination.

Description

technical field [0001] The invention relates to clock technology, in particular to a clock phase detection device and method. Background technique [0002] No matter in the field of communication or in other fields, clock technology has developed very maturely; clock technology includes two key technologies: clock phase detection technology and phase locking technology. [0003] Among them, the clock phase detection technology is used to measure the phase difference of two signals, these two signals are usually the reference signal and the signal under test; the reference signal is a standard clock signal, which has the desired ideal phase when the clock signal is applied , the measured signal is an actual applied clock signal, and its phase is not necessarily the same as that of the reference signal. The purpose of clock phase detection is to accurately measure the phase difference between the reference signal and the measured signal, so as to obtain various clock indicato...

AI Technical Summary

Problems solved by technology

[0010] However, the increase of N value must mean the increase of the number of phase detectors, which will consume more logic resources

Moreover, the increase of the N value will also lead to the reduction of the phase interval between the phase detectors, and the current technical capabilities usually cannot increase the N value to more than 10

It can be seen that the method of using N phase detectors for phase detection not only consumes more logic resources, but also has a limited improvement in the accuracy of clock phase detection.

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