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Frame head detecting device of STM-1 structure in SDH system and method

A detection device and detection method technology, applied in the direction of synchronous signal speed/phase control, etc., can solve the problems of automatically returning to normal working state, unable to realize frame header detection, etc.

Active Publication Date: 2004-12-22
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] In short, after the STM-1 data stream passes through the CDR clock recovery circuit, frequency division and rate conversion, the byte bit combination in the data stream is random, and the existing frame header detection device with STM-1 structure cannot realize frame header detection and It cannot automatically restore its normal working state after the fiber is hot-swapped

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  • Frame head detecting device of STM-1 structure in SDH system and method
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  • Frame head detecting device of STM-1 structure in SDH system and method

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Embodiment Construction

[0038] The application environment of the STM-1 frame header detection device in the embodiment of the present invention is as follows figure 1 As shown, the thin solid line in the figure represents the clock signal, and the thick solid line represents the data flow. The 155M STM-1 bit data stream recovered by the CDR and the 155M clock are divided by 8 (the CDR itself has a frequency division function) to obtain the 19M clock CLK_TI and the 8-bit wide 19M data stream DATA_TI[7:0]. Enter the STM-1 frame header detection device. The frame header signal IFP and the correct data stream RD[7:0] detected by this device are sent to the overhead processing module for overhead processing.

[0039] Such as figure 2 As shown, the STM-1 frame header detection device of the present embodiment includes a data byte bit combination processing module 11, a frame header detection and marking module 12, a data frame header selection and hot plug processing module 13, wherein:

[0040] The d...

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Abstract

The invention discloses a frame head detecting device and method for STM-1 structure in SDH system, which includes: data byte bit compound processing model, which is used for the recombination of byte bits, the b its width data in the device are shifted circularly into a 8 channels data flow; the frame head detecting mark model includes 8 branches, which are connected to 8 channel data, it sends out frame head pulse when detecting the frame head, it carries on frame head mark signal automatic reset when detecting the frame head mark reset signal pulse; and data frame head selecting model, which is used to select the frame head mark signal with frame head pulse and the correspondent branches' data flow output, at the same time, the unique of the frame head signal are detected, when receives several frame head mark signals, it sends out frame head mark reset signal. The invention can carry on frame head detection to STM-1 data flow after through the CDR clock restoration circuit, frequency dividing and speed conversion.

Description

technical field [0001] The invention relates to the SDH transmission field in the communication field, in particular to a data frame header detection device and a detection method of an STM-1 structure in an SDH synchronization number system. Background technique [0002] The STM-1 data stream is transmitted in the form of a frame. To perform overhead processing on the STM-1 data and extract the clock data stream from the STM-1 data for clock analysis and adjustment, the frame boundary must first be determined, which requires Know where the frame header is located. In modern communications, in order to achieve high-speed data transmission, data and clock signals are usually transmitted from the same line; when the signal is received, the clock and data are recovered through the clock recovery circuit, and then frequency division and rate conversion are performed. For the recovered data stream with a rate of 155M, if any adjacent 10 bits are b1, b2, b3, b4, b5, b6, b7, b8, b...

Claims

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Application Information

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IPC IPC(8): H04L7/08
Inventor 曾福民郭丰收
Owner SANECHIPS TECH CO LTD
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