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Three-level neutral point clamping PWM inverter and neutral point voltage controller

A neutral-point clamping and neutral-point voltage technology, which is used in output power conversion devices, irreversible DC power input to AC power output, electrical components, etc. Vulnerable to noise, etc.

Inactive Publication Date: 2004-03-03
YASKAWA DENKI KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0020] However, since this isolation amplifier 6 is analog and has an expensive insulation circuit with wide linear characteristics, there is a problem that the neutral point voltage control device is expensive.
In addition, in the conventional neutral point voltage control device, since the calculation circuit 3 performs neutral point voltage control based on an analog signal, there is a problem that it is easily affected by noise, etc.

Method used

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  • Three-level neutral point clamping PWM inverter and neutral point voltage controller
  • Three-level neutral point clamping PWM inverter and neutral point voltage controller
  • Three-level neutral point clamping PWM inverter and neutral point voltage controller

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Embodiment 1

[0039] refer to Figure 7 A three-phase neutral point clamp type PWM inverter device according to Embodiment 1 of the present invention will be described. Figure 7 It is a block diagram showing the structure of a PWM pulse calculator applied to the three-phase neutral point clamp type PWM inverter device of this embodiment. Such as Figure 7 As shown, the three-phase neutral point clamped PWM inverter device of this embodiment includes a parameter calculator 101 for neutral point potential control, a vector time calculator 102 , a vector time register 103 and a PWM mode setter 104 .

[0040] In the case of the three-phase neutral-point clamped PWM inverter device of this embodiment outputting the output voltage vector V, according to Figure 4 The shown vectors constitute the region (regions 1 to 6) in which the output voltage vector V exists, and output PWM pulses. Assume the classification of the vectors that make up the regions as Figure 4 As shown, the vector time ca...

Embodiment 2

[0109] The second neutral point voltage control device of the present invention will be described. Figure 8 is a block diagram showing the structure of the neutral point voltage control device of this embodiment. Such as Figure 8 As shown, the neutral point voltage control device of this embodiment is composed of a subtractor 1 , two comparators 2 , a calculation circuit 3 and an isolation circuit 10 .

[0110] Subtractor 1 output from the neutral point voltage V CN subtract the first reference voltage V ref1 value. The first reference voltage value V ref1 is a half voltage value (1 / 2·V PN ).

[0111] In addition to the first reference voltage value V ref1 In addition, a second reference voltage value V ref2 and the third reference voltage V ref3 . The second reference voltage value V ref2 and the third reference electric value V ref3 Such as Figure 9 Shown are negative and positive values, respectively.

[0112] A comparator 2 where the output value of the su...

Embodiment 3

[0119] Second, refer to Figure 10 A neutral point voltage control device according to Embodiment 3 of the present invention will be described. Figure 10 It is a block diagram showing the configuration of a neutral point voltage control device according to Embodiment 3 of the present invention. Such as Figure 10 As shown, the difference between the neutral-point voltage control device of this embodiment and the neutral-point voltage control device of the above-mentioned embodiments is that a comparator 4 is provided instead of two comparators 2, and a storage device 5 is provided instead of a calculation circuit 3 .

[0120] Comparator 4 input from the neutral point voltage V CN subtract the first reference voltage V ref1 value, the output value of the subtractor 1 is more than the second reference voltage value V ref2 Small case, in the second reference voltage value V ref2 Above the third reference voltage value V ref3 In the following cases, the ratio of the third ...

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Abstract

On the basis of: a first calculated value ic which is a product of a calculated value of a time of three-phase output voltages in a state where a positive bus, a negative bus, and a neutral line are connected respectively to three-phase phase output terminals, and a predicted neutral current value in the state; and second and third calculated values icx and icy which are products of a calculated value of a time of the three-phase output voltages that can take state 1 where two of the three-phase phase output terminals are connected to the positive bus or the neutral line, and a remaining one terminal is connected to the neutral line or the negative bus, and state 2 opposite to the state, and predicted neutral current values in states 1 and 2, a time ratio of state 1 and 2 during a PWM period is determined so as to make a current flowing through the neutral line close to zero, or a potential of the neutral line of the three-phase output voltages close to a voltage which is exactly the middle between voltages of the positive and negative busses.

Description

technical field [0001] The present invention relates to power conversion devices such as inverters and servo drives for variable-speed drive motors, three-level neutral point clamp type PWM (pulse width modulation) inverter devices as one of the power conversion devices of connection systems, and The voltage between the neutral point and the negative bus, which is the neutral point, is used in this three-level neutral-point clamped PWM inverter device to control the two capacitors connected in series between the positive bus and the negative bus. Voltage neutral point voltage control device. Background technique [0002] figure 1 It is a circuit diagram showing the main circuit configuration of a three-level neutral point clamp type PWM inverter device. Such as figure 1 As shown, the three-level neutral-point clamped PWM inverter device is composed of two capacitors 7 , three-phase output terminals, 12 switching elements, and 18 diodes 9 . [0003] In this three-level ne...

Claims

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Application Information

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IPC IPC(8): H02M7/48H02M7/487
CPCH02M7/487H02M7/48
Inventor 田中善之山中克利渡辺英司
Owner YASKAWA DENKI KK
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