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Refresh circuit and memory

A circuit and counter technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of wasting current, and achieve the effect of avoiding repeated refresh, reducing refresh current, and reducing waste.

Active Publication Date: 2021-05-25
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, under normal process corner or slow process corner conditions, all row addresses corresponding to a longer data retention time will be refreshed in advance, but the refresh command will be sent at a fixed time interval, and at this time it will start from row 0 Start refreshing, but during the data retention time, this part is redundant refreshing, wasting current

Method used

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Embodiment Construction

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art can understand that in each embodiment of the present invention, many technical details are provided for readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in this application can also be realized.

[0027] refer to figure 1 , the refresh circuit includes: a refresh control module 200, which is used to receive and execute a refresh command 100a to output a row address refresh signal 30a; it is also used to receive a process angle signal 10a to adjust the execution ratio of the refresh command 100a, and the process angle signal 10a represents The fast...

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Abstract

The embodiment of the invention provides a refresh circuit and a memory, and the refresh circuit comprises: a refresh control module which is used for receiving and executing a refresh command to output a row address refresh signal, is also used for receiving a process corner signal so as to adjust the execution proportion of the refreshing command, and the faster the process corner represented by the process corner signal is, the higher the adjusted execution proportion is; the row addressing device that is used for receiving the row address refreshing signal and outputting a single row address to be refreshed; and the array refreshing device that is used for carrying out single-row refreshing operation according to the single-row address and outputting a single-row refreshing ending signal after the single-row refreshing is ended. The embodiment of the invention is favorable for reducing the consumption of the refresh current.

Description

technical field [0001] The embodiments of the present invention relate to the field of semiconductors, in particular to a refresh circuit and a memory. Background technique [0002] In order to save the data in the volatile memory, it is necessary to periodically refresh the volatile memory, and the refresh operation needs to complete the refreshing of all rows within the data retention time. The data retention time of the volatile memory is related to the type of chip process corner (Process Corner). The data retention time is shorter under the fast process corner condition, and the data retention time is longer under the slower process corner condition. [0003] The traditional technology will meet the standard of the fast process corner, and send refresh commands at corresponding time intervals according to the data retention time corresponding to the fast process corner, and refresh a fixed number of rows under each refresh command. Refresh all row addresses within. Th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406G11C11/408
CPCG11C11/406G11C11/408
Inventor 谷银川刘格言
Owner CHANGXIN MEMORY TECH INC
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