Parallel bus data space management method and system and master device
A data space and management method technology, applied in the field of communication, can solve the problems of poor flexibility and expansion convenience
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Embodiment 1
[0037] see figure 1 , the present embodiment provides a parallel bus data space management system 10, including a master device 12, a slave device 14 and a plurality of slots 16, the slave device 14 can be one or more, and each slave device 14 can be correspondingly arranged in a slot 16 and connected to the master device 12 through a bus.
[0038] Please combine the picture figure 2 , the master device 12 stores a bus address space for data exchange, the bus address space includes a data space and a configuration space, and the configuration space includes a configuration address space corresponding to each of the slots 16 .
[0039] When the slave device 14 is set in the slot 16, the mapping relationship between the slave device configuration space of the slave device 14 and the configuration address space of the slot 16 is established according to the preset mapping rules, and the slave device of the slot 16 Device information of the slave device 14 is stored in the conf...
Embodiment 2
[0060] Please refer to image 3 , this embodiment provides a parallel bus data space management method, which can be applied to the master device 12 in the parallel bus data space management system 10 in the first embodiment above, and the parallel bus data space management system 10 includes slaves A device 14 and a plurality of slots 16, each of the slave devices 14 can be correspondingly arranged in a slot 16 and connected to the master device 12 through a bus, and the master device 12 stores a bus address for data exchange space, the bus address space includes a data space and a configuration address space corresponding to each of the slots 16, and the method includes:
[0061] Step S110: Detect whether a slave device configuration space is mapped in the configuration address space corresponding to each slot 16.
[0062] Wherein, when the slave device 14 is set in the slot 16, a slave device configuration space is mapped in the configuration address space corresponding to...
Embodiment 3
[0076] The embodiment of the present application provides a master device 12, including a memory and a processor, the memory stores a computer program, and when the computer program is executed by the processor, the parallel bus data space management as described in the second embodiment is realized method.
[0077] Wherein, the processor is configured to execute the steps in the method for managing parallel bus data space in the first embodiment. The memory is used to store various types of data, which may include, for example, instructions of any application or method in the host device 12, as well as application-related data.
[0078] The processor may be an Application Specific Integrated Circuit (ASIC for short), a Digital Signal Processor (DSP for short), a Digital Signal Processing Device (DSPD for short), a programmable logic device (ProgrammableLogicDevice, be called for short PLD), Field Programmable Gate Array (Field Programmable Gate Array, be called for short FPG...
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