PCIE card asynchronous high-performance test method and system
A test method and high-performance technology, which is applied in the field of PCIE card asynchronous high-performance test method and system, can solve the problem of single test content, etc., and achieve the effects of avoiding mistesting, wide applicability, and reducing the number of tests
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Embodiment 1
[0049] Such as figure 1 As shown, the embodiment of the present invention provides a kind of PCIE card asynchronous high-performance testing method, and described method comprises the following steps:
[0050] S101: Insert the PCIE card on the test host through a physical interface, wherein the PCIE card includes n DMA high-speed channels, q BAR low-speed channels and configuration space, and the configuration space is used to store the PCIE card identification information, The number n of DMA high-speed channels, the number q of BAR low-speed channels;
[0051] S102: The test host starts the PCIE card configuration space monitoring thread, and recognizes the PCIE card identification information in the PCIE card configuration space, the number n of DMA high-speed channels, and the number q of BAR low-speed channels;
[0052] S103: The test host starts n DMA test thread groups based on the number n of DMA high-speed channels, and starts q BAR test thread groups based on the nu...
Embodiment 2
[0057] On the basis of the above-mentioned embodiment 1, the difference between the embodiment of the present invention and the above-mentioned embodiment is that this embodiment further optimizes the test process in step S104, and each DMA test thread group includes A DMA sending thread for channel sending test data and a DMA receiving thread for receiving response data, each BAR test thread group includes a BAR sending thread for sending test data to the BAR low-speed channel and a BAR receiving thread for receiving response data, Specifically:
[0058] S1041: The DMA sending thread sends the DMA test data to the corresponding DMA high-speed channel, and the BAR sending thread sends the BAR test data to the corresponding BAR low-speed channel;
[0059] S1042: After the corresponding DMA high-speed channel receives the DMA test data and performs transparent transmission or processing, returns the DMA response data to the corresponding DMA receiving thread; at the same time, t...
Embodiment 3
[0062] In order to test the limit speed of PCIE card, the embodiment of the present invention also provides a kind of PCIE card asynchronous high-performance test method, and the difference with above-mentioned each embodiment is, present embodiment also comprises the following steps:
[0063] S106: After determining that the data processing performance of the PCIE card is qualified, test the limit speed of the corresponding DMA high-speed channel through each DMA test thread group, and test the limit speed of the corresponding BAR low-speed channel through each BAR test thread group.
[0064] As an implementable manner, test the limit speed of the corresponding DMA high-speed channel respectively through each DMA test thread group, specifically including:
[0065] S1061: The DMA sending thread repeatedly sends DMA test data to the corresponding DMA high-speed channel according to the preset initial frequency, and makes the DMA high-speed channel perform frequent processing and...
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