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UVM-based RFID tag chip verification device

An RFID tag and verification device technology, applied in the field of digital system verification of tag chips, can solve a large number of directional excitation, low verification efficiency and other problems, and achieve the effect of convenient injection error frame mechanism, solving verification sufficiency, and flexible platform construction.

Inactive Publication Date: 2020-12-11
上海明矽微电子有限公司
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0003] Traditional verification methods require a large number of directional excitations, artificial detection of waveform verification, resulting in low verification efficiency

Method used

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  • UVM-based RFID tag chip verification device
  • UVM-based RFID tag chip verification device

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Embodiment Construction

[0039] In order to make the purpose, technical solution and advantages of the present invention clearer, based on the ISO / IEC 15693 protocol, the present invention will be further described in detail in combination with the accompanying drawings and examples. The specific examples described here are only used to explain the present invention, not to limit the present invention.

[0040] Such as figure 2 As shown, the clock generating module generates a clock (13.56Mhz) and sends it to the virtual interface module (virtualinterface). In verifying the top-level module (top_tb.sv), the clock in the virtual interface module is connected to the clock input terminal of the DUT top-level. The driver (driver) and the input monitoring module (monitor) can call the clock signal in the virtual interface module.

[0041] Such as figure 2 As shown, the test case generates the required transaction class (Transaction), which includes parameters required for framing such as vcd2vicc_data_c...

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Abstract

The invention discloses a UVM-based RFID tag chip verification device. The device comprises static components including a virtual interface module, a runtest calling method, a clock generation module,a DUT of an RFID tag and an EEPROM (Electrically Erasable Programmable Read Only Memory) module. Dynamic components comprise a base test module, a mycase module, an ENV module, a CONFIGURATION module, an agent module, a scoreboard module, a refresh module, a driver module and a monitor module. According to the method, the methodology of the UVM is adopted, so that the verification efficiency is higher. The hierarchy is clear, and the verification efficiency and credibility are improved by generating different test cases and a large number of randomized tests.

Description

technical field [0001] The invention belongs to the field of chip verification. In particular, it relates to a digital system verification method of a tag chip. Background technique [0002] With the complex functions of high-frequency or ultra-high-frequency RFID tag chip digital system modules, the difficulty of protocol implementation and verification increases, and the verification work has become an important link in the design of tag chips. [0003] Traditional verification methods require a large number of directional excitations, artificial detection of waveform verification, resulting in low verification efficiency. The present invention builds a brand new label chip digital verification system based on UVM (Universal Verification Methodology) methodology, completes the RTL function verification of the label chip, and effectively solves many drawbacks of traditional verification methods. Contents of the invention [0004] figure 2 The tree structure diagram for...

Claims

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Application Information

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IPC IPC(8): G06F11/36
CPCG06F11/3684
Inventor 孙晓霞张建伟
Owner 上海明矽微电子有限公司
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