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Reverse connection prevention circuit

An anti-reverse circuit and interface technology, applied in emergency protection circuit devices, electrical components, etc., can solve problems such as small practical application range

Pending Publication Date: 2020-09-18
南京影宸影视器材有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The circuit uses two field effect transistors and two diodes to achieve anti-reverse connection, but the specific wiring structu

Method used

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  • Reverse connection prevention circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0023] to combine figure 1 , an anti-reverse connection circuit, the anti-reverse connection circuit is connected to an external interface J1 composed of a first pin and a second pin, and is characterized in that the anti-reverse connection circuit includes an NMOS transistor M1 and a PMOS transistor M5, a first diode tube D4 and the second diode D5, where:

[0024] - the cathode of the first diode D4, the anode of the second diode D5, the gate of the NMOS transistor M1, and the gate of the PMOS transistor M5 are all connected to the first pin of the external interface J1;

[0025] - the drain of the NMOS transistor M1 and the drain of the PMOS transistor M5 are both connected to the second pin of the external interface J1;

[0026] - the source of the NMOS transistor M1 is connected to the anode of the first diode D4, and the source of the PMOS transistor M5 is connected to the cathode of the second diode D5;

[0027] - Both ends of the load RL are respectively connected to...

Embodiment 2

[0033] to combine figure 2 The difference between this embodiment and Embodiment 1 is that it also includes a first current limiting resistor R4 and a second current limiting resistor R5, the gate of the PMOS transistor M5 is connected to the external interface J1 through the first current limiting resistor R4 The first pin of the NMOS transistor M1 is connected to the first pin of the external interface J1 through the second current limiting resistor R5.

[0034] The protection resistor can be used to adjust the on-off speed of the MOS tube. When the gate protection resistance is small, the on-off speed of the MOS tube is fast and the switching loss is small; on the contrary, when the gate protection resistance is large, the on-off speed of the MOS tube is slow. Switching losses are high. However, if the on-off speed is too fast, the voltage and current change rate of the MOS tube will be greatly increased, thereby generating greater interference and affecting the work of t...

Embodiment 3

[0036] to combine image 3 , The difference between this embodiment and Embodiment 2 is that it includes both the first zener diode D6 and the second zener diode D7, and the first current limiting resistor R4 and the second current limiting resistor R5; the first zener diode D6 Connected between the gate and the source of the PMOS transistor M5; the second Zener diode D7 is connected between the gate and the source of the NMOS transistor M1. The gate of the PMOS transistor M5 is connected to the first pin of the external interface J1 through the first current limiting resistor R4; the gate of the NMOS transistor M1 is connected to the first pin of the external interface J1 through the second current limiting resistor R5. a pin.

[0037] This scheme has all advantages of embodiment 1-2 concurrently.

[0038] At the same time, when the input voltage is higher than the highest voltage of the gate of the MOS transistor, the Zener diode connected to the gate and the source can pr...

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Abstract

The invention discloses a reverse connection prevention circuit, which is connected to an external interface J1 composed of a first pin and a second pin, and comprises an NMOS tube M1, a PMOS tube M5,a first diode D4 and a second diode D5, wherein the negative electrode of the first diode D4, the positive electrode of the second diode D5, the grid electrode of the NMOS tube M1 and the grid electrode of the PMOS tube M5 are all connected to the first pin of the external interface J1, the drain electrode of the NMOS tube M1 and the drain electrode of the PMOS tube M5 are connected to the secondpin of the external interface J1, the source electrode of the NMOS tube M1 is connected with the positive electrode of the first diode D4, the source electrode of the PMOS tube M5 is connected with the negative electrode of the second diode D5, and two ends of a load RL are respectively connected with the positive electrode of the first diode D4 and the negative electrode of the second diode D5.The normal work of the load RL can be ensured when the external interface J1 is positively connected or negatively connected.

Description

technical field [0001] The invention relates to the field of protection circuits, in particular to an anti-reverse connection circuit. Background technique [0002] In the design without anti-reverse connection circuit, if the user reverses the positive and negative poles of the power supply, accidents may occur or electronic products may be burned. In order to prevent these accidents and improve product reliability, we can design an anti-reverse connection circuit. We can use diodes to design anti-reverse connections, and we can also use field effect transistors to design anti-reverse connections circuits. Using diodes to design anti-reverse connection circuits is simple and low-cost, but it will take up more voltage drops. The conduction internal resistance of the FET is very small, usually only a few milliohms, and the voltage drop is very small. [0003] CN 205160498 U provides an anti-reverse connection circuit, wherein: the anti-reverse connection circuit is connect...

Claims

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Application Information

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IPC IPC(8): H02H11/00
CPCH02H11/003H02H11/006
Inventor 韦洪胜刘万国张杭
Owner 南京影宸影视器材有限公司
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