SRAM storage device and method based on SRIO protocol

Abstract

The invention discloses an SRAM storage device and method based on an SRIO protocol. The system comprises an SRAM memory bank, an SRIO controller, a packet forwarding logic module, an arbitration logic module and an assembly line logic module, wherein the SRIO controller comprises a local SRIO controller, an upstream SRIO controller and a downstream SRIO controller; the packet forwarding logic module is used for selecting a local SRIO controller or an upstream SRIO controller or a downstream SRIO controller according to the address in the request packet and forwarding the request packet; the arbitration logic module is used for access control of requests of a plurality of SRIO controllers, and the pipeline logic module is used for data flow control among the SRIO controllers, the packet forwarding logic module, the arbitration logic module and the SRAM memory bank. The SRAM storage device has the advantages that the problems of capacity expansion and refreshing time of the storage bodyof the DDR-based storage device are solved.

Description

technical field [0001] The invention relates to the technical field of digital signal processors, and in particular to an SRAM storage device and method based on the SRIO protocol. Background technique [0002] The digital signal processor uses a hierarchical storage structure, and the general implementation from the upper layer to the lower layer is: general-purpose registers, multi-level Cache structure, and main memory. The general implementation of main memory is DDR, and DDR is usually composed of DDR (Double Data Rate, double rate) controller, DDR PHY and DDR particles. For digital signal processors, the main problem with using DDR as main memory is the refresh time, which is caused by the physical characteristics of DDR particles. Due to the existence of the refresh process, the effective bandwidth of DDR will be reduced by 6% to 10%, and the access delay will be unstable. These factors restrict the application scenarios with strict real-time requirements. Another s...

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is that the storage volume of the storage device based on DDR in the prior art cannot be expanded in capacity and there is a problem of refresh time

[0006] With the help of a series of advantages of SRIO controller protocol, such as expandable, fixed delay, safety and reliability, combined with the characteristics of SRAM memory banks that do not need to be refreshed, the problem of refreshing time in traditional DDR is solved, and the packet forwarding logic module receives data from SRIO control The request packet of the controller, the request packet includes the address of the target SRAM to be accessed, according to the corresponding relationship between the address and the cascade expansion topology, select the correct SRIO controller to forward the request packet, and solve the problem of SRAM memory bank capacity expansion

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