A scalable multi-output interrupt controller

Abstract

An expandable multi-output interrupt controller disclosed in the present invention includes an interrupt information module, the input end of the interrupt information module is connected with multiple processor cores to prepare interrupt information, and the input end of the interrupt information module is also connected with multiple interrupt sources to receive multiple For different interrupt signals, the output terminals of the interrupt information module are respectively connected to multiple identical interrupt control modules to send the highest priority signal of the effective interrupt source to each interrupt control module. Each interrupt control module is connected to a processor core respectively. Each interrupt The control module exchanges interrupt information with the processor core to control the interrupt of the processor core. The invention provides an expandable multi-output interrupt controller, which has good expansibility to the number of processors and interrupt sources.

Description

technical field [0001] The invention belongs to the technical field of interrupt control of embedded processors, and in particular relates to an expandable multi-output interrupt controller. Background technique [0002] With the development of microprocessors, improving work efficiency and reducing system power consumption have become the main development trend, thus introducing interrupts. Interruption means that when the processor is working, due to internal or external emergencies, the processor has to suspend the current work and jump to the interrupt program. After the interrupt program is executed, it returns to the previously suspended program to continue working. Interruptions occur randomly during this process. [0003] As the performance of the processor is getting higher and higher, the requirements for the main frequency are constantly increasing, thus introducing multi-core processors, and there are more and more types of interrupts, so the interrupt control i...

AI Technical Summary

Problems solved by technology

Many companies at home and abroad have done a lot of related research, such as ARM's GIC protocol, its circuit structure is complex, because it needs to provide interrupts in multi-processor systems, it is usually suitable for large-scale system design, but for systems with fewer cores There will be a lot of hardware overhead, such as the MPIC protocol proposed by IBM based on the Open PIC protocol, which supports up to four processors and up to 128 interrupt sources, and the scalability of the number of processors and interrupt sources is not enough.

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