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Manufacturing method of multilayer substrate and multilayer substrate

A technology of multi-layer substrate and manufacturing method, which is applied in the direction of multi-layer circuit manufacturing, printed circuit manufacturing, and electrical connection formation of printed components, etc., which can solve the problem of unsatisfactory interlayer conductivity and signal transmission, manufacturing process and equipment High requirements, complex manufacturing process and other issues, to achieve the effect of facilitating mass production, simple and convenient manufacturing methods, and improving product quality and performance

Inactive Publication Date: 2019-10-22
ELECTRIC CONNECTOR TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, its manufacturing process is bound to be complex and inefficient, and due to the high requirements on the manufacturing process and equipment, the effect of interlayer conductivity and signal transmission may not be ideal.

Method used

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  • Manufacturing method of multilayer substrate and multilayer substrate
  • Manufacturing method of multilayer substrate and multilayer substrate
  • Manufacturing method of multilayer substrate and multilayer substrate

Examples

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Embodiment Construction

[0038] In order to fully understand the advantages of the present invention and the objects attained by the embodiments of the present invention, the structures of some embodiments are shown, however, the present invention can be implemented in many different forms and should not be construed as being limited by the implementations set forth herein. Example limitations. Rather, these embodiments are presented so that this will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Preferred embodiments of the present invention will be described in more detail below with reference to the accompanying drawings.

[0039] see figure 1 , combined with Figure 3A ~ Figure 3G As shown, generally, the multilayer substrate 00 includes an insulating base material 001 , a first conductive pattern layer 002 , a second conductive pattern l...

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Abstract

The invention discloses a manufacturing method of a multilayer substrate. The method comprises the following steps of: the step 1, providing an insulating substrate; the step 2, covering an insulatingfilm on the surface of the insulating substrate; the step 3, manufacturing at least one hole part on the basis; the step 4, filling conductive slurry in at least one hole part, and solidifying the conductive slurry filled in the at least one hole part; the step 5, removing the insulating film, and exposing the cured at least one conductive slurry on the surface of the insulating substrate to format least one interlayer connection conductor; the step 6, attaching a conductive foil layer on the at least one surface of the insulating substrate, and performing laminating for bonding; the step 7,etching at least one of the conductive foil layers to form a predetermined conductive pattern; and the step 8, repeating the above steps 1-7 for many times, and finally performing laminating to forma multi-layer substrate. The invention provides a multilayer substrate manufactured by the method.

Description

technical field [0001] The invention relates to a method for manufacturing a multilayer substrate and a multilayer substrate manufactured by the method. Background technique [0002] Recently, a large number of various multilayer substrates have been popularized, and a multilayer substrate formed of a plurality of insulating base layers forming conductive patterns is known (for example, refer to Patent Document 1). [0003] In the multilayer substrate of Patent Document 1, a conductor is patterned on an insulating base layer, and the electrical interlayer connection of each layer is performed through an interlayer connection conductor. [0004] prior art literature [0005] patent documents [0006] Patent Document 1: Chinese Patent Publication No. CN206698489U. [0007] However, the interlayer connection conductor in Patent Document 1 must consider the adhesion to the plane conductive pattern layer, and it is necessary to add additional plated bumps on the copper surface...

Claims

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Application Information

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IPC IPC(8): H05K3/46H05K3/00H05K3/42
CPCH05K3/0011H05K3/429H05K3/4614H05K3/4626
Inventor 陈国防
Owner ELECTRIC CONNECTOR TECH
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