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A device and method for reducing adc sampling rate

A sampling rate, band-pass sampling technology, applied in the field of terahertz communication, achieves the effects of easy implementation, small structural restrictions, and simplified circuit design

Active Publication Date: 2021-10-22
博微太赫兹信息科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, for high-speed signal transmission, the traditional zero-IF receiver solution can no longer meet the requirements

Method used

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  • A device and method for reducing adc sampling rate
  • A device and method for reducing adc sampling rate
  • A device and method for reducing adc sampling rate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0030] Such as Figure 1-2 As shown, this embodiment provides a technical solution: a device for reducing the ADC sampling rate, including an IQ modulator 1, a single-pole double-throw switch 5, an intermediate frequency band-pass sampling link 2, a PLL reference clock configurator 4, and a zero-IF Sampling link 3;

[0031] The intermediate frequency bandpass sampling link 2 and the zero intermediate frequency sampling link 3 are set in parallel;

[0032] The SPDT switch 5 is used to control the opening and closing of the intermediate frequency bandpass sampling link 2 and the zero intermediate frequency sampling link 3, and select different sampling modes;

[0033] The PLL reference clock configurator 4 is electrically connected to the IQ modulator 1 for generating a clock pulse signal;

[0034] The IQ modulator 1 is located in the zero-IF sampling link 3 and is used to demodulate the IF signal processed by the receiver.

[0035] The IQ modulator 1 includes an inductor 11,...

Embodiment 2

[0048] The difference between this embodiment and Embodiment 1 is that this embodiment provides a method for reducing the ADC sampling rate, including the following steps:

[0049] S1: The receiver down-converts the terahertz signal to an intermediate frequency signal

[0050] The signal is down-converted from the terahertz signal THz in the receiver to become the intermediate frequency signal IF;

[0051] S2: Select the sampling link through the single-pole double-throw switch 5 according to the center frequency of the signal.

[0052] When the signal center frequency of the intermediate frequency signal IF in S1 is relatively high, the intermediate frequency band-pass sampling link 2 is turned on through the SPDT switch 5;

[0053] S3: Sampling and processing the signal through the sampling link selected in S2

[0054] When the intermediate frequency band-pass sampling link 2 is turned on, the intermediate frequency signal IF with a higher center frequency is directly conn...

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Abstract

The invention discloses a device and method for reducing the sampling rate of an ADC, including an IQ modulator, a single-pole double-throw switch, an intermediate frequency band-pass sampling link, a PLL reference clock configurator, and a zero-intermediate frequency sampling link. The intermediate frequency band-pass sampling The link and the zero-IF sampling link are arranged in parallel, and the single-pole double-throw switch is used to control the opening and closing of the intermediate frequency band-pass sampling link and the zero-IF sampling link, and select different sampling modes. The present invention combines a traditional zero-IF low-pass sampling device with a band-pass sampling device, uses a built-in switch for channel selection, uses a low-pass sampling device when the signal center frequency is low, and uses a band-pass sampling device when the signal center frequency is high. The structure is simple and easy to process, it can be mass-produced, the structure is limited, and it is easy to implement. Its design method is more flexible, and the signal reception of different frequency bands can be realized by adjusting the channel selection, which simplifies the circuit design from the intermediate frequency to the baseband, and reduces the ADC. sampling rate.

Description

technical field [0001] The invention relates to the technical field of terahertz communication, in particular to a device and method for reducing the sampling rate of an ADC. Background technique [0002] Many signals encountered in signal processing are band-pass signals, and the bandwidth of such signals is often much smaller than the center frequency of the signal. If the upper cutoff frequency of the bandpass signal is f H , the lower cutoff frequency is f L , then the sampling frequency does not need to be higher than twice the cut-off frequency f H , the sampling frequency can be determined according to the bandpass sampling theorem. [0003] Bandpass sampling theorem: a frequency band limited to (f L , f H ) time continuous signal x(t), signal bandwidth B=f H -f L ,let M=f H / B-N, where N is not greater than f H The largest positive integer of / B, if the sampling frequency f s To meet the conditions: [0004] [0005] Then the original signal can be reco...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/00H04B1/16H03M1/12
CPCH03M1/1245H04B1/0007H04B1/005H04B1/16
Inventor 张文翔孙晨谭名昇
Owner 博微太赫兹信息科技有限公司
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