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Semiconductor wafer chip sorting method, and semiconductor product packaging method and system

A technology of semiconductors and wafers, which is applied in the field of packaging methods and systems of semiconductor products, and can solve problems such as the decline in production capacity of production equipment

Active Publication Date: 2019-05-31
SHENZHEN STS MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0023] Based on this problem, a new wafer chip sorting method is designed, which realizes that the performance of two chips mounted in the same semiconductor device is basically the same, and also overcomes the difficulty that the production capacity of production equipment will drop significantly after adopting this method

Method used

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  • Semiconductor wafer chip sorting method, and semiconductor product packaging method and system
  • Semiconductor wafer chip sorting method, and semiconductor product packaging method and system
  • Semiconductor wafer chip sorting method, and semiconductor product packaging method and system

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Embodiment Construction

[0058] Hereinafter, the present invention will be further described with reference to the drawings and specific embodiments.

[0059] Invention idea

[0060] 1. Divide the qualified chips on the wafer into several grades according to performance and generate an electronic wafer map containing performance grade information;

[0061] 2. On the sorting equipment, divide all grades into several groups according to the maximum difference between the two performance grades allowed by the same device;

[0062] 3. The sorting equipment reads the electronic wafer map, and gradually selects the wafers according to the order of the grade grouping, but the same grade group does not consider the sorting of the grades contained in it on the output wafer, so as to improve the sorting of the production equipment speed;

[0063] 4. The sorting production equipment reconstructs the output wafer frame according to the grade grouping order and provides it to the production equipment of the pl...

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Abstract

The invention discloses a semiconductor wafer chip sorting method. Qualified chips on an original wafer can be sorted and the qualified chips are placed on a reconstructed wafer according to the performance level grouping rule of the chips. The semiconductor wafer chip sorting method comprises the following steps of a performance level marking step S101: dividing the qualified chips on the original wafer into M performance levels according to performance differences by a device traceability system; an original information transmission step S102; a performance level grouping step S103: carryingout level grouping rule setting on a sorting device; a performance level selection step S104: reading an original electronic wafer map, and selecting the qualified chips on the original wafer according to a grouping selection rule by the sorting device; a reconstructed wafer reconstruction step S105; and a reconstruction information transmission step S106. The invention also discloses a semiconductor product packaging method and system. The technical effects of saving cost and increasing a production rate are achieved.

Description

technical field [0001] The invention relates to the technical field of methods or apparatus (H01L 21 / 00) specially adapted for processing semiconductor devices or parts thereof, in particular the invention relates to the technical field specially adapted for transfer between different wafers during the processing of semiconductor devices or parts Wafer method (H01L 21 / 677), the present invention specifically relates to a semiconductor wafer chip sorting method, a semiconductor product packaging method and a system. Background technique [0002] In the semiconductor packaging production process, due to application requirements, some products need to mount two chips of the same type in the same semiconductor device, and the performance of the two chips is required to be basically similar to ensure the stability of the device. However, the reality is that the performance of each chip on the same semiconductor wafer must be different, and its performance level is randomly distri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/67H01L21/50B07C5/02B07C5/34B07C5/36B07C5/38
Inventor 梁承财吴迪周福鸣
Owner SHENZHEN STS MICROELECTRONICS
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