Segmented pseudo-data weighted average DEM circuit

Abstract

The invention relates to a segmented pseudo-data weighted average DEM circuit, comprising: a data segmentation circuit, a pseudo-data weighted average circuit, a data dynamic element matching circuit,a data input end, a data output end, a first clock signal end and a second clock signal end, wherein the data segmentation circuit is respectively connected with the pseudo-data weighted average circuit and the data dynamic element matching circuit; the data input end is connected with the data segmentation circuit; the data output end is respectively connected with the pseudo-data weighted average circuit and the data dynamic element matching circuit; the first clock signal end is respectively connected with the pseudo-data weighted average circuit and the data dynamic element matching circuit; and the second clock signal end is connected with the pseudo-data weighted average circuit. By means of this DEM circuit, the overall nonlinearity of the DAC due to the mismatch between multi-bitDAC units can be eliminated, and the performance of the entire modulator is improved.

Description

technical field [0001] The invention belongs to the field of analog integrated circuit design, in particular to a segmented pseudo-data weighted average DEM circuit. Background technique [0002] In the multi-bit quantized Sigma Delta modulator, the overall nonlinearity of the DAC caused by the mismatch between the multi-bit DAC (Digital to analog converter, digital-to-analog converter) units will be added directly without loop filtering and noise shaping. Into the signal path, thereby raising the noise floor in the output spectrum, and increasing the SFDR (Spurious Free Dynamic range, spurious free dynamic range), affecting the dynamic performance of the modulator. [0003] In order to eliminate the non-linearity of the DAC, a DEM (Dynamic Element Matching, dynamic unit matching) circuit is usually connected after the quantizer to randomly rotate the DAC unit; the traditional DEM circuit structure mainly uses the full adder to sequentially accumulate the rotation pointers. ...

AI Technical Summary

Problems solved by technology

[0002] In the multi-bit quantized Sigma Delta modulator, the overall nonlinearity of the DAC caused by the mismatch between the multi-bit DAC (Digital to analog converter, digital-to-analog converter) units will be added directly without loop filtering and noise shaping. Into the signal path, thereby raising the noise floor in the output spectrum, and increasing the SFDR (Spurious Free Dynamic range, spurious-free dynamic range), affecting the dynamic performance of the modulator

[0003] In order to eliminate the non-linearity of the DAC, a DEM (Dynamic Element Matching, dynamic unit matching) circuit is usually connected after the quantizer to randomly rotate the DAC unit; the traditional DEM circuit structure mainly uses the full adder to sequentially accumulate the rotation pointers. In this way, the DAC unit is selected, but if a unit is gated multiple times, the energy of the matching error corresponding to the unit will be strengthened, increasing the harmonics in the output spectrum of the modulator, affecting the modulator performance

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