MIPI C-PHY signal generating method, device and system

Abstract

The invention discloses an MIPI C-PHY signal generating method, device and system. The method comprises the following steps: 1) receiving a C-PHY signal starting parameter and image source data, and performing data management and flow control according to the starting parameter; 2) packaging a code stream in the starting parameter to form an LP signal group packet; 3) performing one-hot encoding on the data of the LP signal group packet, mapping an encoded LP signal to a 3-wire for transmission; 4) packaging the image source data, and distributing a packaged HS signal onto each lane; 5) encoding the HS signal, then outputting the encoded HS signal, and converting the parallel HS signal into a serial output of each wire; and 6) aliasing a high speed signal and a low speed signal to form a C-PHY signal source, and outputting the C-PHY signal source to a module. parallel 6lane is maximally supported, the data transmission speed of 17.1 Gbps per lane meets the throughput requirement of a C-phy module of any resolution on the market, the adaptability is high, the layout and wiring are simple, and the hardware cost is low, so that the MIPI C-PHY signal generating method, device and system are worthy of popularization and application.

Description

technical field [0001] The present invention relates to the technical field of liquid crystal modules, in particular to a MIPI C-PHY signal generation method, device and system. Background technique [0002] With the advancement of science and technology, people's demand for high-definition resolution display modules is becoming stronger and stronger. At present, the MIPI DPHY interface cannot meet the transmission rate requirements of 10Gbps and above due to its rate bottleneck. Therefore, the VESA Association proposed the MIPI C-PHY interface protocol to meet higher-speed transmission requirements. This protocol defines a transmission rate of 5.7Gbps per lane, supports a maximum of 6 lanes, and a throughput of up to 34gbps. Currently, LCD module factories are developing C-PHY interface display modules to meet market demand. Before the C-PHY module enters the market, the module needs to be tested to determine whether the module is a qualified product. Among them, the most ...

AI Technical Summary

Problems solved by technology

In order to meet the test requirements, a signal generator capable of generating C-PHY signals is required, but currently there are only a few foreign chips on the market that can output C-PHY signals, and there are too many restrictions on application scenarios, which is not conducive to more scenarios application under

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