Configuration space access method and device, architecture and storage medium

Abstract

The embodiment of the invention provides a configuration space access method and device, architecture and a storage medium. The processor architecture with the bridge chip comprises a processor and the bridge chip, the processor is connected with the bridge chip through an HT bus; an address space corresponding to the PCI / PCIe equipment configuration space is reserved in an address window in the HT interface of the processor; The method comprises the following steps: loading a first driver by using a unified extensible firmware interface, wherein the first driver is a driver for accessing a PCI / PCIe equipment configuration space through an address space reserved on a processor; According to the first driver, installing an access protocol for accessing the PCI / PCIe equipment configuration space; And according to the access protocol, realizing an access operation on the PCI / PCIe equipment configuration space by utilizing the first driver. Therefore, the access of the CPU to the PCI / PCIeequipment configuration space can be realized through the address space by utilizing the first driver, so that the realization mode of the access to the PCI / PCIe equipment configuration space is expanded, and the use of the bridge chip is ensured.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a configuration space access method, a configuration space access device, a processor architecture and a storage medium. Background technique [0002] At present, the main function of UEFI (Chinese: Unified Extensible Firmware Interface; English: Unified Extensible FirmwareInterface) firmware is to initialize the host hardware device and boot the operating system, PCI (Chinese: Peripheral Component Expansion Interface; English: Peripheral Component Interconnect) The / PCIe (Chinese: Peripheral Component Rapid Expansion Interface; English: Peripheral Component Interconnect Express) device is an important peripheral device of the host, and the initialization of the PCI / PCIe device has become one of the important functions of the UEFI firmware. PCI / PCIe The initialization of the device needs to access the configuration space of PCI / PCIe. [0003] UEFI firmware accesse...

AI Technical Summary

Problems solved by technology

[0003] UEFI firmware accesses the configuration space of PCI / PCIe devices based on X86 and ARM platforms. It accesses the configuration space through two sets of I / O registers provided by the CPU. At present, in microprocessors without internal interlocked piped stages, MIPS) platform cannot use address space to access PCI / PCIe device configuration space

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