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Shift register and driving method thereof, gate driving circuit and display device

A shift register and circuit technology, applied in the field of gate drive circuits, display devices, shift registers and their driving methods, capable of solving problems such as insufficient charging of pull-up nodes

Active Publication Date: 2019-04-05
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present invention provide a shift register and its driving method, a gate driving circuit, and a display device, which can solve the problem of insufficient charging of the pull-up node caused by the shift of the threshold voltage of the transistor connected to the signal input terminal. question

Method used

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  • Shift register and driving method thereof, gate driving circuit and display device
  • Shift register and driving method thereof, gate driving circuit and display device
  • Shift register and driving method thereof, gate driving circuit and display device

Examples

Experimental program
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Effect test

Embodiment 1

[0056] suggestive, such as figure 2 As shown, in addition to being connected to the first control node O1 and the pull-up node PU, the functional subcircuit 100 is also connected to the second clock signal terminal CK2. The functional sub-circuit 100 is used to control the on-off between the first control node O1 and the pull-up node PU under the control of the voltage of the second clock signal terminal CK2.

[0057] On this basis, as figure 2 As shown, in the first embodiment, the first control terminal S connected to the first control sub-circuit 1021 is the fourth voltage terminal VDD. At this time, the first control sub-circuit 1021 is used to output the voltage of the fourth voltage terminal VDD to the pull-down node PD under the control of the voltage of the fourth voltage terminal VDD and the pull-up node PU. The first control sub-circuit 1021 is further configured to output the voltage of the third voltage terminal VGL to the pull-down node PD under the control of...

Embodiment 2

[0062] suggestive, such as image 3 As shown, the register also includes: a function control subcircuit 200 and a second storage subcircuit 202 .

[0063] The function control sub-circuit 200 is connected to the second clock signal terminal CK2, the second control node O2, and the pull-up node PU. The function control sub-circuit 200 is used to output the voltage of the second clock signal terminal CK2 to the second control node O2 under the control of the voltage of the second clock signal terminal CK2 . The function control sub-circuit 200 is also used to output the voltage of the second clock signal terminal CK2 to the second control node O2 under the control of the voltage of the pull-up node PU.

[0064] The second storage sub-circuit 202 is connected to the second control node O2 and the third voltage terminal VGL. The second storage sub-circuit 202 is used for storing the voltage of the second control node O2. The second storage sub-circuit 202 is also used for disch...

Embodiment 3

[0073] suggestive, such as Figure 4 As shown, the shift register further includes: a function control subcircuit 200 and a second storage subcircuit 202 .

[0074]The function control sub-circuit 200 is connected to the second clock signal terminal CK2, the second control node O2, and the pull-up node PU. The function control sub-circuit 200 is used to output the voltage of the second clock signal terminal CK2 to the second control node O2 under the control of the voltage of the second clock signal terminal CK2 . The function control sub-circuit 200 is also used to output the voltage of the second clock signal terminal CK2 to the second control node O2 under the control of the voltage of the pull-up node PU.

[0075] The second storage sub-circuit 202 is connected to the second control node O2 and the third voltage terminal VGL. The second storage sub-circuit 202 is used for storing the voltage of the second control node O2. The second storage sub-circuit 202 is also used ...

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Abstract

The embodiment of the invention provides a shift register and a driving method thereof, a gate driving circuit and a display device, which relate to the technical field of display and can be used to solve the problem of insufficient charging of the pull-up node caused by the deviation of the threshold voltage of the transistor connected with the signal input terminal. In the shift register, a functional sub-circuit is connected with a first control node and a pull-up node and is used for controlling the on-off between the first control node and the pull-up node; an output sub-circuit is used for outputting the voltage of a first clock signal terminal to a signal output terminal under the control of the voltage of the pull-up node; a first control sub-circuit is used for outputting the voltage of a first control terminal to a pull-down node and outputting the voltage of a third voltage terminal to the pull-down node; a second control sub-circuit is used for outputting the voltage of thethird voltage terminal to the pull-up node under the control of the voltage of the pull-down node; and a pull-down sub-circuit is used for outputting the voltage of the third voltage terminal to thesignal output terminal under the control of the voltage of the pull-down node.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a shift register, a driving method thereof, a gate driving circuit, and a display device. Background technique [0002] GOA (Gate Driver on Array, array substrate row drive) is a technology that integrates the gate drive circuit on the array substrate, in which each stage of the GOA circuit (that is, the shift register) is connected to a row of gate lines. The gate scan signal is output to the gate line to realize the progressive scanning of multiple gate lines in the display panel. [0003] Wherein, for the shift register in the GOA circuit with bidirectional scanning function in the related art, schematically, as Figure 1a As shown, when the GOA circuit is scanning forward, the transistor (T1 transistor) connected to the input signal terminal Input in the shift register is in a negative biased state, and its threshold voltage is prone to negative offset (for example, ...

Claims

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Application Information

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IPC IPC(8): G09G3/20G11C19/28
CPCG09G3/20G11C19/28G09G2310/0286G09G2310/0267G09G3/3266G09G3/3674G09G2310/08
Inventor 王志冲李付强冯京刘鹏栾兴龙
Owner BOE TECH GRP CO LTD
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