A bridging device for multi-way low speed peripheral integration

Abstract

The invention belongs to the technical field of digital circuit front-end design, in particular to a bridging device for integrating multiple low-speed peripheral devices, which is applied to expand low-speed peripheral devices on the periphery of a processor. The invention can ensure the stable and reliable data transmission from the external expansion interface of the higher speed processor to the low speed external equipment. Compared with the scheme built with discrete devices, the invention can greatly reduce the area of the circuit board, achieve the purpose of reducing the cost, and atthe same time provide convenience for logic debugging and use. In the application process, the invention can conveniently provide the user expansion setting, conveniently increase or decrease the logical use resource amount according to the actual use situation, and has good adaptability. In addition, the scalable peripheral unit in the invention can be used in cascade to construct the secondary address mapping relationship, and has stronger adaptability to the design with less address space. When bandwidth and FPGA resources permit, a processor peripheral interface can be provided to synchronize across clock domains with any number of low speed peripheral devices.

Description

technical field [0001] The invention belongs to the technical field of front-end design of digital circuits, and in particular relates to a bridging device for integrating low-speed peripherals of multiple paths, which is applied to expand low-speed peripherals on the periphery of a processor. Background technique [0002] In the field of industrial control, low-speed communication interfaces such as serial ports and CAN are commonly used command and data transmission channels. In a whole machine system, usually multiple serial ports and CAN are integrated on a host node or relay node. These control systems are usually used in the embedded field, and are installed in the chassis by means of line cards. The size of the line card is small, and when the traditional serial port control chip and CAN interface control chip are used to realize, the area of ​​the board card will be insufficient. By integrating an FPGA chip with a suitable capacity on the periphery of the processor...

AI Technical Summary

Problems solved by technology

[0005] The present invention proposes a bridge device for the integration of multi-channel low-speed peripherals to solve the problem of synchronizing cross-clock domain behavior between multi-channel serial port logic and external low-speed devices

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