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DSP hardware abstraction lay and DSP processor

A hardware abstraction layer and component technology, applied in the direction of electrical digital data processing, instruments, electrical components, etc., can solve the problems of complexity, large differences in underlying interface drivers, low portability of DSP hardware abstraction layer, etc., and achieve high versatility performance and scalability, and portability improvements

Active Publication Date: 2019-03-01
HUNAN INSTITUTE OF SCIENCE AND TECHNOLOGY +1
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Problems solved by technology

[0003] In wireless communication, the underlying interface drivers of DSP (Digital Signal Processing, digital signal processing) processors are quite different and complex. For different underlying interface drivers and waveform components, it is necessary to develop a specific hardware abstraction layer to communicate with the underlying interface The driver is coupled with the upper waveform components, resulting in low portability of the DSP hardware abstraction layer

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  • DSP hardware abstraction lay and DSP processor
  • DSP hardware abstraction lay and DSP processor
  • DSP hardware abstraction lay and DSP processor

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[0015] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0016] In one embodiment, a DSP (Digital Signal Processing, digital signal processing) hardware abstraction layer is provided, such as figure 1 As shown, the DSP hardware abstraction layer 110 includes: a bus interface adaptation module 111 , a message receiving analysis module 112 and a component interface adaptation module 113 .

[0017] The bus interface adaptation module 111 is respectively connected with the interface driver layer including at least one interface driver and the message receiving and analyzing module 112, and is used to receive the first hardware abstr...

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Abstract

The present application relates to a DSP hardware abstraction layer and a DSP processor. The DSP hardware abstraction layer includes: a bus interface adaptation module, a message receiving and analyzing module and a component interface adapt module, the DSP hardware abstraction layer is completely isolated from the underlying bus drivers by a bus interface adaptation module, the DSP hardware abstraction layer is completely isolated from waveform component of upper layer through component interface adaptation module. As that code of the DSP hardware abstraction lay has the platform-independentproperty, the DSP hardware abstraction layer can be very conveniently apply to different hardware platforms, has high versatility and scalability, and effectively improves the portability of the DSP hardware abstraction layer.

Description

technical field [0001] The present application relates to the technical field of wireless communication, in particular to a DSP hardware abstraction layer and a DSP processor. Background technique [0002] With the rapid development of wireless communication technology, software radio technology is becoming more and more mature, and it has been widely used in military communication, personal mobile communication and other fields. The ideal state of software radio is to make wireless communication equipment adopt a general, standard and modular hardware platform. Various functions of the wireless device are realized through software programming and dynamic loading and unloading. [0003] In wireless communication, the underlying interface drivers of DSP (Digital Signal Processing, digital signal processing) processors are quite different and complex. For different underlying interface drivers and waveform components, it is necessary to develop a specific hardware abstraction ...

Claims

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Application Information

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IPC IPC(8): G06F13/10H04L25/02
CPCG06F13/107H04L25/026
Inventor 吴宇谢文武施峻武王德刚向良军朱鹏
Owner HUNAN INSTITUTE OF SCIENCE AND TECHNOLOGY
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