Intelligent automatic compiling method and system based on zynq system

Abstract

The invention discloses an intelligent automatic compiling method and a system based on a zynq system. The method comprises the following steps: 1) storing an FPGA project under an intelligent automatic compiling running directory of the zynq system; 2) runing that shell script file to create a project; 3) importing a hardware description file; 4) generate a device tree directory and a configuration directory; 5) automatically replace a fixed configuration file with a configuration standard part, and replacing that configuration file with an object file; 6) automatically modifying the device tree configuration file according to the rules of the device tree parsing modifier, searching, comparing and modifying the non-standard syntax description and characteristic parameters in the target file; 7) Recording kernel, u-Boot, rootfs configuration file compilation process, generate compilation log; 8) finis firmware packing and generate compiled file. That invention generates standard partsby fixedly modifying part in the engineering update, and directly replaces the standard parts, thereby solving the problems of repeated operations caused by frequent FPGA engineering replacement and affecting engineering development and human consumption.

Description

technical field [0001] The invention relates to the technical field of embedded system platforms, in particular to an intelligent automatic compilation method and system based on a zynq system. Background technique [0002] At present, more and more SOC chips with ARM+FPGA architecture are widely used. For example, the zynq series of xilinx company, the integration of ARM and FPGA really brings benefits to hardware design and control. But the current software firmware (including Boot.bin, Image.ub, Top.bit) is bound by both ARM and FPGA. If one party changes the function, it must be recompiled and generated, especially in the early stage of debugging. Including the widely used boot Boot (fsbl.elf and u-boot), linux kernel and FPGA project. We currently use the petalinux tool to complete the compilation of the zynq system. [0003] Fpga engineers provide the content of the hardware description file directory, and then run a set of compilation tool commands on the host com...

AI Technical Summary

Problems solved by technology

[0014] The disadvantages of the above process are: 1) Due to the frequent replacement of FPGA projects, repeated operations have greatly affected the development of the entire project and human consumption

2) Some of the software modifications caused by the project update are fixed, and some are changed. The changed parts need to be retrieved every time to judge and modify

3) Compilation takes a long time, and there may be compilation interruptions caused by various factors in the middle, requiring manpower to track and modify in real time

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