Semiconductor structure and method of forming same

Abstract

The invention provides a semiconductor structure and a method of forming the same. The method comprises the steps of providing a substrate comprising a core region and a peripheral region; forming a dummy gate structure on the substrate, the dummy gate structure including a gate oxide layer and a dummy gate electrode layer on the gate oxide layer; forming an interlayer dielectric layer on the exposed substrate of the dummy gate structure, the interlayer dielectric layer exposing the top of the dummy gate structure; removing the dummy gate structure of the core region, and forming a first opening exposing the substrate in the interlayer dielectric layer of the core region; forming a sacrificial layer on the exposed substrate of the first opening; after the sacrificial layer is formed, removing the dummy gate electrode layer of the peripheral region, and forming a second opening in the interlayer dielectric layer of the peripheral region; removing the sacrificial layer; and forming a high-k gate dielectric layer on the gate oxide layer in the bottom and the sidewall of the first opening, sidewall of a second opening and a gate oxide layer in the second opening. Through the technicalscheme of the present invention, the quality and thickness uniformity of the gate oxide layer in the peripheral region are improved, and the process of removing the dummy gate electrode layer in the peripheral region prevents causing loss or damage to the substrate of the core region.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to accommodate the reduction in feature size, the channel length of MOSFETs has also been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur. [0003] Therefore, in order to better adapt to the reduction of the feature size, the semiconductor ...

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Problems solved by technology

[0004] However, the performance of semiconductor devices formed by the prior art needs to be improved

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