Three-dimensional memory and method for formation of three-dimensional memory

A memory and memory layer technology, applied in the semiconductor field, can solve the problems of reducing the retention characteristics of three-dimensional memory, use stability, more parasitic charges, and more defects in the tunneling layer, so as to improve the retention characteristics and stability, and reduce parasitic charges. Effect

Active Publication Date: 2019-02-01
YANGTZE MEMORY TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

Due to the gas source selection and process characteristics, the tunneling layer formed by this method has more defects, and the parasitic charge between the tunneling layer and the interface of the charge trapping layer is more, which reduces the retention characteristics and stability of the three-dimensional memory.

Method used

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Embodiment Construction

[0028] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0029] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0030] As indicated in this application and claims, the terms "a", "an", "an" and / or "the" do not refer to the singular and may include the plural unless the context clearly indicates an exception. Generally speaking, the terms "comprising" and "comprising" only suggest the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list, and the method or device may also contain other st...

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Abstract

The present invention provides a three-dimensional memory. The three-dimensional memory comprises a memory layer arranged in a channel hole, the memory layer comprises a barrier layer and a complex function layer which are arranged in order in the direction from the outer portion of the channel hole to the inner portion of the channel hole, the complex function layer comprises a charge capture portion and a tunnelling portion, the charge capture portion and the tunnelling portion are arranged in order in the direction from the outer portion of the channel hole to the inner portion of the channel hole; and the complex function layer is obtained by partial oxidation of the charge capture layer, wherein the oxidation portion of the charge capture layer form the tunnelling portion, and the portion without oxidation of the charge capture layer forms the charge capture portion.

Description

technical field [0001] The invention mainly relates to the field of semiconductors, in particular to a three-dimensional memory and a method for forming the three-dimensional memory. Background technique [0002] With the continuous improvement of the market's requirements for storage density, the reduction of key dimensions of two-dimensional memory has reached the limit of mass production technology. In order to further increase storage capacity and reduce costs, a three-dimensional structure memory is proposed. [0003] For the charge-trapping three-dimensional memory, the memory layer composed of tunneling layer, charge-trapping layer and blocking layer is the key structure. Among them, the tunneling layer is a key structure that determines the storage function of the three-dimensional memory, and it has an important impact on the erasing and writing speed and the retention characteristics of the three-dimensional memory. The tunneling layer is usually deposited by chem...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11563H01L27/11582
CPCH10B43/00H10B43/27
Inventor 王启光靳磊刘红涛
Owner YANGTZE MEMORY TECH CO LTD
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