Communication system based on FPGA and ASIC

Abstract

The invention discloses a communication system based on an FPGA and an ASIC, relating to the technical field of optical communication, and aiming to solve the technical problem that due to the presence of spurious charges and residual charges in the prior art, a clock signal for Li-Fi encoding has high delay and low precision during implementation, lacks an effective Li-Fi receiving module, and does not have power supply matching characteristics. The communication system mainly comprises an optical communication module and a wireless fidelity communication module, wherein the optical communication module is used for the field programmable gate array (FPGA) and the application-specific integrated circuit (ASIC) to perform Li-Fi signal communication; the wireless fidelity communication module is used for the FPGA and the ASIC to perform Wi-Fi signal compensation communication; and the optical communication module receives Li-Fi signals sent by the FPGA through a delay locked loop of theASIC, or the optical communication module is driven by the delay locked loop of the ASIC and transmits the Li-Fi signals to the FPGA. The scheme of the invention is used for the design of Li-FI communication circuits.

Description

technical field [0001] The invention relates to the technical field of optical communication, in particular to a communication system based on FPGA and ASIC. Background technique [0002] With the development of intelligent communication technology, power line carrier and wired interconnection have gradually evolved into radio interconnection. Nowadays, radio interconnection has also taken an important step towards the future, and Li-Fi optoelectronic interconnection has appeared. Li-Fi photoelectric interconnection currently mainly has difficulties in realizing the lossless transmission of signal clocks. Due to the parasitic charge of the switch and the accumulation of the residual charge of the capacitive and inductive devices in the power supply circuit and the drive circuit, when the power is turned on next time, the amplitude of the impact charge at the moment of turning on is very high, and it is easy to be damaged after being superimposed with the parasitic charge or...

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Problems solved by technology

[0003] In view of the above-mentioned prior art, the purpose of the present invention is to provide a communication system based on FPGA and ASIC, which aims to solve the problem of high delay in the implementation of the clock signal used for Li-Fi encoding due to the existence of parasitic charges and residual charges in the prior art. , low precision, lack of effective Li-Fi receiving module and technical problems without power matching characteristics

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