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Method and test device of judging flash memory chip reliability on basis of operation time or currents

A flash memory chip, operating time technology, applied in static memory, instruments, etc., can solve the problem that flash memory data loss cannot be prevented, and achieve accurate judgment results and prevent data loss

Active Publication Date: 2018-11-16
武汉置富半导体技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The method based on the error rate is easily affected by the value of the stored data and must be judged by the error rate after reading the data. This method cannot prevent data loss caused by the sudden failure of the flash memory

Method used

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  • Method and test device of judging flash memory chip reliability on basis of operation time or currents
  • Method and test device of judging flash memory chip reliability on basis of operation time or currents
  • Method and test device of judging flash memory chip reliability on basis of operation time or currents

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Embodiment Construction

[0046] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0047] figure 1 For the present invention realizes the schematic flow chart of judging the reliability of a flash memory chip based on operating time and current, the judgment process shown in the figure is applicable to all types of flash memory chips, and a kind of flash memory chip product is used as an embodiment below figure 1 Give a detailed explanation.

[0048] In this embodiment, a multi-level cell NAND flash (MLC NAND flash) product under a certain manufacturing process is used as an object for judging the reliability of a flash memory chip. like figure 1 As shown, the method includes:

[0049] Step S01, extract the flash memory samples according to the following rules: the sample flash memory must be t...

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PUM

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Abstract

The invention belongs to flash memory chip reliability test technology, and particularly relates to a method and a test device of judging flash memory chip reliability through operation time or currents. According to the method, firstly, operation time or currents of a sample flash memory chip are collected through the test device, then data are analyzed, correspondence relationships of the data and flash memory chip reliability are established, then the operation time and the currents of a to-be-tested flash memory chip are collected by the test device, and finally, the correspondence relationships of the reliability are combined for judging the reliability of the to-be-tested chip. Compared with general methods, the method of judging the flash memory chip reliability provided by the invention is not liable to interference of values of stored data in flash memory, and overcomes, at the same time, the shortcomings that the general methods cannot effectively prevent sudden invalidationof the flash memory and caused data losses.

Description

technical field [0001] The invention relates to the field of reliability testing of flash memory chips, in particular to a method and a testing device for judging the reliability of flash memory chips based on operating time or current. Background technique [0002] With the rapid development of electronic technology, memory, as a carrier for storing data, is increasingly used in electronic systems. Among the memory products, as a non-volatile memory, the flash memory chip has the advantages of high storage capacity and low manufacturing cost. It is the fastest-growing memory product in recent years and gradually occupies a leading position in the non-volatile memory market. [0003] Due to the structural characteristics of the flash memory chip, the medium of the storage unit will have defects as the number of operations increases. These defects will continue to accumulate during use and eventually cause the storage unit to fail, thereby affecting the normal use of the enti...

Claims

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Application Information

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IPC IPC(8): G11C29/56
CPCG11C29/56
Inventor 潘玉茜李四林
Owner 武汉置富半导体技术有限公司
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