Real-time super-resolution method and system based on FPGA
A technology of super-resolution and interpolation method, applied in the field of image processing, which can solve the problems of difficult practical application, high computational cost, insufficient output frame rate, etc.
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[0098]Preferred embodiment one: consists of three main parts:
[0099] · Scheduling module: Calculate the TV value of each block according to the equation mentioned above. Blocks whose TV values are greater than a predetermined threshold are then assigned to the neural network, while other values are assigned to the interpolation module.
[0100] Pipelined neural network: FSRCNN-s is a pipelined structure implemented in the pipeline stage. The number of multipliers per stage is also configured to achieve a balanced throughput of the stage.
[0101] · Interpolation module: Simple and fast interpolation module, which handles modules whose TV value is lower than the threshold. Bilinear algorithm can improve image quality with lower operation cost and better performance. Finally, the data blocks output from the network or interpolation components are combined to generate the final output high-resolution image.
[0102] In a TV-based mask, the vertical and horizontal gradie...
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