Double-precision floating point extraction operation method and system

Abstract

The invention relates to a double-precision floating point extraction operation method and system. The method comprises the steps that 1, a 64-bit double-precision floating point number is disintegrated into sign bits, orders and mantissa, a positive / negative value of a to-be-extracted number is judged based on the sign bits, exponent parity of the to-be-extracted number is judged based on the orders, the mantissa is shifted according to the exponent parity, and the sign bits and exponents obtained after operation are stored into an RAM; 2, the mantissa part of the to-be-extracted number is input into an extraction module, extraction operation is performed on a magnified 106-bit fixed-point number through a CORDIC algorithm, a correction coefficient K value is processed through shift operation in an FPGA, an auxiliary parameter COMPLE is calculated according to the value of the mantissa, and meanwhile repeated iteration is performed during partial iterative operation (i,3i+1 times) inoperation of the 106-bit fixed-point number; and 3, arithmetic square roots of the mantissa are output, and after special values are isolated, the rest is combined with the sign bits and the exponentsin the RAM to complete double-precision floating point number extraction operation. Through the double-precision floating point extraction operation method and system, operation efficiency can be substantially improved.

Description

technical field [0001] The invention belongs to the application field of digital signal processing, and relates to an algorithm of square root operation of a double-precision floating-point number and a realization method thereof. Background technique [0002] In modern digital signal processing, addition, subtraction, multiplication and division are the most frequently used operations. Although the square root operation is not as widely used as the above-mentioned operations, as a basic mathematical operation, it still has important applications in engineering practice, such as trigonometry, quadratic equation solving, numerical analysis, probability statistics, image processing In other fields, there are many different algorithms for square root calculation, for example, Newton iterative method, SRT-redundant algorithm, non-redundant algorithm, CORDIC algorithm, etc. After analysis, this design adopts the algorithm of Coordinate Rotation Digital Computer (CORDIC), which i...

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Problems solved by technology

Usually due to the complex implementation logic and large resource usage, the SRT-redundant algorithm and non-redundant algorithm are not suitable in practice, and the Newton iteration method and CORDIC algorithm are most used

[0004] In the literature "Single Precision Floating-Point Number Square Root Algorithm Design and FPGA Implementation", the square root mean value theorem algorithm is used to complete the fixed-point number square root operation of the mantissa part. This algorithm is clear in principle and easy to implement, but its iterations increase with The bit width of the fixed-point number to be squared increases exponentially, and its maximum realized bit width is 16 bits, which is difficult to meet the square root requirements of double-precision floating-point numbers

The literature "Research and Design of CORDIC Algorithm Based on Floating-Point Numbers" uses the CORDIC algorithm, and the design content includes not only the square root operation, but also other trigonometric functions and some linear operations, but its design is based on single-precision floating-point numbers. When it reaches double precision, its operation rate and resource consumption will increase significantly

However, the document "Study on Solving Square Root Based on CORDIC Algorithm and FPGA Implementation" only describes a method for realizing the square root of a fixed-point number, and the definition domain of the number to be rooted cannot be applied to double-precision floating-point numbers.

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