Method and device of avoiding repeated data recovery and solid state drive (SSD)

Abstract

The invention provides a method and a device of avoiding repeated data recovery and a solid state drive (SSD). The method includes: updating a mapping relationship cache table, which is stored in a cache chip, in real time, and recording data positions of data block updating; updating a mapping relationship table, which is stored in a flash memory chip, according to the mapping relationship cachetable, flashing the data positions of data block updating downwards to the flash memory chip; and reconstructing a mapping relationship table, which is stored in the cache chip, according to the mapping relationship table, a data position of last updating in host writing data blocks and a data position of last updating in recovery writing data blocks when a host is powered on again. The method updates the mapping relationship cache table in real time after a writing operation to avoid prolonging of a data updating cycle due to updating the mapping cache table after a target block is filled bywriting. In addition, according to the method, a sequential order of written data can be determined in reconstruction of the mapping relationship cache table through recording the data positions of data block updating, and thus reconstruction accuracy performance of the mapping relationship cache table is ensured.

Description

technical field [0001] The present disclosure relates to the technical field of solid-state hard disks, and in particular to a method and device for avoiding repeated recovery of data, and solid-state hard disks. Background technique [0002] SSDs (Solid State Drives, solid state drives) have been widely used in high-performance storage systems because of their low read and write latency and high bandwidth. Please refer to figure 1 , which is a schematic structural diagram of a common solid-state hard drive. Depend on figure 1 It can be seen that the control part of the solid-state hard disk 500 is the control chip 200, and the CPU 201 inside the control chip 200 is responsible for the overall scheduling control of each hardware module in the SSD and the communication with the host 100; the storage space of the solid-state hard disk 500 includes the cache chip 300 (such as DRAM ) and a flash memory chip 400 (such as Nand flash). Among them, the cache chip 300 belongs to d...

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a method, device, and solid-state hard disk for avoiding repeated recovery of data, so as to solve the problem that in the prior art, when the host computer loses power when the target block is not fully written, the target block that has been written needs to be data recovery issues

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