Method and device for measuring system manager interrupt time

Abstract

The invention discloses a method and a device for measuring the system manager interrupt time. The method includes triggering SMI (system manager interrupt), and then reading the count of first TSC (time stamp counter) clocks in processors of SMM (system management modes); executing SMI processing programs corresponding to the SMI by the aid of main processors and then reading the count of second TSC clocks; judging whether the execution time corresponding to the SMI is longer than the maximum SMI time or not; updating the maximum SMI time, the SMI cumulative time and SMI trigger frequencies in OEMACPI (original equipment manufacturer advanced configuration and power interface) tables if the execution time corresponding to the SMI is longer than the maximum SMI time, and quitting the SMM. The count of the first TSC clocks is used as preset locations for storing first time stamps in memories. The count of the second TSC clocks is used as second time stamps. The method and the device have the advantages that the execution time of the SMI is acquired by the aid of the TSC clocks, accordingly, access delay can be shortened, the accuracy of the obtained execution time of the SMI can be improved, and parameters stored in the OEMACPI tables can be analyzed by operating systems and can be used for measuring the system performance.

Description

technical field [0001] The invention relates to the field of computer application technology, in particular to a method and device for measuring system management interruption time. Background technique [0002] In the past, x86 used INT x to handle interrupt programs. Later, there were more and more interrupts to be processed. In order to make it easier for software and hardware designers to design interrupt programs that meet the needs, the CPU provides more SMI (System Manager Interrupt, system management interrupt ) and SMM (System Management Mode, system management mode). In intel386, a special mode of operation introduced by intel 486, in this mode, can perform advanced power management, hardware control and run OEM code. It is completely transparent to the operating system, which means that the operating system does not know when the CPU will enter and exit SMM. SMI is the only way to enter SMM. SMI can be enabled by the SMI# pin of the processor or the SMI informat...

AI Technical Summary

Problems solved by technology

[0003] Due to the rapid development of computer system hardware, a system has more and more CPUs, which greatly improves the multitasking performance of the whole machine. However, the events of each CPU processed by the system firmware using SMI become more complicated and take more time. In this way, it is necessary to test the SMI interrupt processing time in the hardware system development stage to measure whether it meets the system constraints without affecting system performance, for example, whether the processing program times out, whether the SMI interrupt usage frequency is too high, etc.

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