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New 8b/10b encoding implementation method

An implementation method and coding technology, applied in the direction of code conversion, electrical components, etc., can solve the problems of increasing circuit area, reading time constraints, etc.

Pending Publication Date: 2017-05-31
UNIV OF ELECTRONICS SCI & TECH OF CHINA +1
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Problems solved by technology

[0008] The above-mentioned first method is simple and direct to implement, but since each encoding result is stored, the area of ​​the circuit is increased, and the circuit is also restricted by the memory read time

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  • New 8b/10b encoding implementation method
  • New 8b/10b encoding implementation method
  • New 8b/10b encoding implementation method

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Embodiment Construction

[0032] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0033] The 8b / 10b encoding flow chart of the invention is as follows image 3 shown, including the following steps:

[0034] 1. Input 8bit code word, K code indication and polarity indication. On the one hand, it is used as the input of 4b / 6b and 3b / 4b encoding and low four-bit statistics, and on the other hand, it participates in the decoding of the selection signal of 4b / 6b and 3b / 4b encoding results;

[0035] 2, 4b / 6b and 3b / 4b encoding and lower four statistics. These three parts of processing are carried out in parallel and synchronously, among which 4b / 6b encoding uses the above-mentioned ...

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Abstract

The invention discloses a new 8b / 10b encoding implementation method. The contents provided by the invention is to simply a 8b / 10b encoding table through the discovered rule to provide a new 8b / 10b encoding implementation scheme according to the simplified encoding table. The implementation process of the scheme provided by the invention comprises: inputting 8 bit code words, K codes, polar indication, performing 4b / 6b and 3b / 4b encoding and low-four-bit statistics, selecting 4b / 6b and 3b / 4b encoding results, selecting polarity, and outputting a 10bit encoding result and the polar indication. The 4b / 6bn encoding is implemented by simplifying 5b / 6b encoding by using the rule 1 in the invention; and code word classification in the rule 2 is realized by the low-four-bit statistics; and in the selecting 4b / 6b and 3b / 4b encoding results and selecting polarity, and bitwise processing is carried out on the 4b / 6b and 3b / 4b encoding results according to the rule 2. Compared with the traditional blocked implementation scheme of 5b / 6b encoding and 3b / 4b encoding, the scheme in the invention not only simplifies the implementation scale of the circuit, but also reduces the delay from input to output to a certain extent, and reinforce the efficiency and instantaneity of encoding.

Description

technical field [0001] The invention relates to a computer communication system, in particular to a new 8b / 10b coding realization method. Background technique [0002] In today's communication industry, data transmission between chips and systems is changing from traditional parallel low-speed transmission to high-speed serial transmission. In most high-speed serial transmission technologies, the sending channel hides the high-speed clock information in the user data, that is, does not send a dedicated high-speed clock synchronization signal separately; the receiving channel receives the attenuated high-speed serial input data, and according to its jump edge information The high-speed clock information is extracted, and the phase of the local sampling clock is adjusted to ensure that the phase of the sampling clock can accurately locate the middle position of the input data symbol. [0003] However, if there are too many consecutive "0"s or "1"s in the transmitted high-spee...

Claims

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Application Information

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IPC IPC(8): H03M7/14
CPCH03M7/14
Inventor 王忆文李博刘云龙孙博文李大超
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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