Array substrate, manufacturing method thereof, and display device

Abstract

The invention discloses an array substrate and a manufacturing method of the array substrate as well as a display device. The array substrate comprises a pixel array composed of pixel units which are arrayed in a matrix manner, and a plurality of grid electrode wires which extend along the transverse direction of the pixel array; a routing region is arranged between every two adjacent rows of the pixel units; types of each routing region comprise a first routing region, a second routing region and a third routing region; each routing region is provided with a data line; at most one grid electrode output line is arranged in each second routing region, and is connected with the corresponding grid electrode line; each third routing region is provided with two data lines located on different thin film layers; the distance between the two data lines of each third routing region along the transverse direction of the pixel units is less than or equal to 0. According to the array substrate disclosed by the invention, the distance between the grid electrode output line and each data line can be increased, voltage coupling on the data lines is reduced, and the bright spot problem is solved; meanwhile, the distance between the two data lines of each third routing region is reduced, and influences on the picture quality effect can be weakened.

Description

Technical field [0001] The present invention relates to the field of display technology, and more specifically, to an array substrate, a manufacturing method of the array substrate, and a display device having the array substrate. Background technique [0002] Display devices with thin film transistors (TFTs) are now gradually becoming mainstream display devices. Each pixel on this type of display device is driven by a thin film transistor integrated behind the pixel. Specifically, the array substrate of this type of display device is also called a TFT substrate, including a pixel array, which is used to drive and control the gate lines, data lines, and gate output lines of each pixel in the pixel array. [0003] In the prior art, the gate lines of the array substrate are usually arranged along the direction of the pixel array row, and the data lines and the gate output lines are usually arranged along the direction of the pixel array column. The wiring diagram of the metal line is...

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Problems solved by technology

[0005] However, the inventors have found that although this arrangement method solves the above-mentioned bright spot problem, however, a certain amount of space must be required between the two data lines on the same layer and parallel to each other when the two data lines are arranged in the same wiring area. interval, the interval will undoubtedly occupy the area originally belonging to the pixel unit, and the pixel unit with reduced area will be darker in brightness compared with the normal pixel unit. Therefore, the above-mentioned improvement method in the prior art actually has an impact New problems with picture quality

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