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Interrupt processing method, IOAPIC (Input/ Output Advanced Programmable Interrupt Controller) and computer system

A technology of a computer system and a processing method, applied in the computer field, can solve problems such as system confusion and the inability of operating system 1 to execute normally.

Active Publication Date: 2017-02-22
HUAWEI TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example: when the IOAPIC is maliciously modified, the interrupt corresponding to the load operating system 1 is sent to the processor of the load operating system 2, which will cause system confusion and operating system 1 cannot normally perform operations based on the interrupt

Method used

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  • Interrupt processing method, IOAPIC (Input/ Output Advanced Programmable Interrupt Controller) and computer system
  • Interrupt processing method, IOAPIC (Input/ Output Advanced Programmable Interrupt Controller) and computer system
  • Interrupt processing method, IOAPIC (Input/ Output Advanced Programmable Interrupt Controller) and computer system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0053] An embodiment of the present invention provides an interrupt processing method, which is applied to a computer system. Such as figure 1 As shown, the method includes the following steps:

[0054] It should be noted that the computer system includes an IOAPIC, a management operating system and at least one load operating system. Wherein, the management operating system is used for managing the IOAPIC, and configures hardware resources for each of the at least one load operating system, and records the correspondence between each load operating system and its hardware resources. Hardware resources configured for a load operating system include at least one processor and at least one peripheral device. Wherein, the processor may be a CPU (Central Processing Unit, central processing unit).

[0055] 101. The IOAPIC receives a first interrupt request sent by a first peripheral device.

[0056] Wherein, the first peripheral device is one of the peripheral devices configure...

Embodiment 2

[0086] An embodiment of the present invention provides an IOAPIC20, the IOAPIC20 belongs to a computer system, the computer system includes a management operating system and at least one load operating system, the management operating system is used to manage the IOAPIC20, and is the at least one load operating system Each operating system in the load operating system configures hardware resources, and records the corresponding relationship between each operating system and the hardware resources of the operating system, and the operating system in the at least one operating system configures There is at least one processor and at least one peripheral device.

[0087] Such as image 3 As shown, the IOAPIC20 includes: a receiving unit 201 , a determining unit 202 and a sending unit 203 .

[0088] The receiving unit 201 is configured to receive a first interrupt request sent by a first peripheral device.

[0089] The determining unit 202 is configured to determine the first lo...

Embodiment 4

[0105] An embodiment of the present invention provides an IOAPIC30, the IOAPIC30 belongs to a computer system, the computer system includes a management operating system and at least one load operating system, the management operating system is used to manage the IOAPIC30, and is the at least one load operating system Each operating system in the load operating system configures hardware resources, and records the corresponding relationship between the operating system of each load and the hardware resources of the operating system of each load, and the operating system of each load in the at least one operating system of the load configures There is at least one processor and at least one peripheral device.

[0106] Such as Figure 4 As shown, the IOAPIC30 includes a processor 301 , a system bus 302 , a communication interface 303 and a memory 304 .

[0107] Wherein, the processor 301 may be a central processing unit (English: central processing unit, abbreviated: CPU). It ...

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PUM

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Abstract

The invention provides an interrupt processing method, an IOAPIC (Input / Output Advanced Programmable Interrupt Controller) and a computer system, relates to the technical field of the computer and is used for the IOAPIC to accurately forward an interrupt request. According to a preset mapping relationship between an IOAPIC physical pin and a processor or a processor cluster, the IOAPIC forwards the interrupt request, and an IOAPIC interrupt forwarding error can be avoided to a certain degree. The interrupt processing method comprises the following steps of: the IOAPIC receives a first interrupt request sent from first peripheral equipment; according to a corresponding relationship, which is recorded by a management operating system, between each load operating system and the hardware resource of each load operating system, the first load operating system corresponding to the first peripheral equipment is determined; and according to the preset mapping relationship between the IOAPIC physical pin and the processor or the processor cluster, through the physical pin corresponding to the processor or the processor cluster of the first load operating system, the first interrupt request is sent to the processor or the processor cluster of the first load operating system.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to an interrupt processing method, an IOAPIC and a computer system. Background technique [0002] At present, IOAPIC (Input / Output Advanced Programmable Interrupt Controller, input / output advanced programmable interrupt controller), LAPIC (Local Advanced Programmable Interrupt Controller, local advanced programmable interrupt controller) can realize interrupt control. [0003] At present, for a system with a single core (that is, there is only one operating system, which may include multiple CPUs), the IOAPIC can forward the interrupt to any CPU after receiving the interrupt. With the development of the computer technology field, a multi-core (multi-operating system) scenario is derived, including a management operating system and at least one load operating system. The management operating system configures at least one peripheral device and at least one processor for each load ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06F9/50
Inventor 陆钢高云伟邬小龙詹剑锋
Owner HUAWEI TECH CO LTD
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