Interrupt processing method, IOAPIC (Input/ Output Advanced Programmable Interrupt Controller) and computer system
A technology of a computer system and a processing method, applied in the computer field, can solve problems such as system confusion and the inability of operating system 1 to execute normally.
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Embodiment 1
[0053] An embodiment of the present invention provides an interrupt processing method, which is applied to a computer system. Such as figure 1 As shown, the method includes the following steps:
[0054] It should be noted that the computer system includes an IOAPIC, a management operating system and at least one load operating system. Wherein, the management operating system is used for managing the IOAPIC, and configures hardware resources for each of the at least one load operating system, and records the correspondence between each load operating system and its hardware resources. Hardware resources configured for a load operating system include at least one processor and at least one peripheral device. Wherein, the processor may be a CPU (Central Processing Unit, central processing unit).
[0055] 101. The IOAPIC receives a first interrupt request sent by a first peripheral device.
[0056] Wherein, the first peripheral device is one of the peripheral devices configure...
Embodiment 2
[0086] An embodiment of the present invention provides an IOAPIC20, the IOAPIC20 belongs to a computer system, the computer system includes a management operating system and at least one load operating system, the management operating system is used to manage the IOAPIC20, and is the at least one load operating system Each operating system in the load operating system configures hardware resources, and records the corresponding relationship between each operating system and the hardware resources of the operating system, and the operating system in the at least one operating system configures There is at least one processor and at least one peripheral device.
[0087] Such as image 3 As shown, the IOAPIC20 includes: a receiving unit 201 , a determining unit 202 and a sending unit 203 .
[0088] The receiving unit 201 is configured to receive a first interrupt request sent by a first peripheral device.
[0089] The determining unit 202 is configured to determine the first lo...
Embodiment 4
[0105] An embodiment of the present invention provides an IOAPIC30, the IOAPIC30 belongs to a computer system, the computer system includes a management operating system and at least one load operating system, the management operating system is used to manage the IOAPIC30, and is the at least one load operating system Each operating system in the load operating system configures hardware resources, and records the corresponding relationship between the operating system of each load and the hardware resources of the operating system of each load, and the operating system of each load in the at least one operating system of the load configures There is at least one processor and at least one peripheral device.
[0106] Such as Figure 4 As shown, the IOAPIC30 includes a processor 301 , a system bus 302 , a communication interface 303 and a memory 304 .
[0107] Wherein, the processor 301 may be a central processing unit (English: central processing unit, abbreviated: CPU). It ...
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