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Block encoder and encoding method of polarization code

An encoding method and polar code technology are applied in the field of encoding devices and can solve the problems of high algorithm complexity and low processing speed.

Active Publication Date: 2016-12-21
SHANDONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, there are many schemes for the coding design of polar codes, but the algorithm complexity is high and the processing speed is low.

Method used

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  • Block encoder and encoding method of polarization code

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Embodiment 1

[0062] Figure 5 , 6 , 7 are respectively the input coding module that is example with the polar code block encoder of code length N=16, K=4, generate matrix module and multiplier module, the present invention uses G 16 Middle G 4 And the 4×4 zero matrix is ​​a block, so that each clock of the information sequence inputs 4 information bits, and the operation result of the 4-bit signal and the 4×4 matrix block is stored in the lower four bits of the 16-bit register, and the second The clock then inputs 4 bits of information, and the operation result of the 4×4 matrix block is XORed according to the operation result of each row of the generation matrix and the corresponding 4 bits in the 16-bit register, and so on, according to the characteristics of the generation matrix The 4-bit input information of each clock and the operation result of the 4×4 matrix block are subjected to XOR operation, and the last 4-bit information bit input is selected and XOR operation is performed...

Embodiment 2

[0067] Assuming that the test input data is 1101_1111_0001_0101, the signal of the first clock entering the encoder is in[3:0]=1011, after a series of XOR operations in the input encoding module, the output of the module is out[0]=in [0]^in[1]^in[2]^in[3]=1, out[1]=in[1]^in[3]=0, out[2]=in[2]^in[ 3]=1, out[3]=in[3]=1, and generate G[0]=1 in the matrix module at the same time, G[1], G[2], G[3] save G in the shift register respectively [0], G[1], G[2] data, then G[3:0]=0001, the output of the above two modules is used as the input of the multiplier module, by Figure 7, a four-bit two-to-one multiplexer with G[0] as the selection terminal, since G[0]=1, the output terminal of the selector is 1101, then V[3:0]=1101, G[1] , G[2], G[3] are all 0, so the output of the selector with these three bits as the selector is 0000, so V[15:4]=0000_0000_0000, in summary V[15:0] =0000_0000_0000_1101; the input signal of the second clock is in[3:0]=1111, and the output of the input encoding m...

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Abstract

The invention relates to a block encoder and an encoding method of a polarization code, and belongs to the technical field of encoding devices. According to the block encoder and the encoding method of the polarization code, the problems of high algorithm complexity and relatively low processing speed existing in the prior art are solved. The block encoder comprises an input encoding module, a generator matrix module and a multiplier module; and each module is provided with multiple exclusive-OR gates and multiple time delay units. The encoding method comprises the steps of grouping to-be-encoded input information sequences; constructing a generator matrix of the polarization codes; and generating an encoding result. The principle of the block encoder and the encoding method of the polarization code is that a matrix GN is compressed, a position containing F<Kronecker product k> is replaced by 1, a K*K zero matrix is replaced by zero, the compressed matrix is the generator matrix F< Kronecker product (n-k)> of the encoder; K information bits are input to the information sequences per each clock; and a result of corresponding encoding operation for a matrix GK is output after the result is subjected to selection and exclusive-OR operation. According to the block encoder and encoding method of the polarization code, K-bit data can be input at each clock, and N-bit data can be output after 1+N / K clocks, so that encoding delay is reduced, and the encoding efficiency is improved.

Description

technical field [0001] The invention relates to a polar code block encoder and an encoding method thereof, and belongs to the technical field of encoding devices. Background technique [0002] The continuous evolution of modern communication systems and networks has profoundly changed people's lives, among which people are most impressed by the change of transmission rate, from the first generation of analog communication technology, the second generation of digital communication technology, the third generation of CDMA communication technology and the current With the industrialized 4G technology, the transmission rate of the encoding device is getting faster and faster. With the development of communication technology, 5G networks have gradually begun to develop. At present, many countries around the world have been competing to carry out the research and development of 5G network technology. As early as 2009, Huawei had already launched early research on related technolog...

Claims

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Application Information

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IPC IPC(8): H03M13/37
CPCH03M13/13H03M13/37
Inventor 张小军曾庆田刘艳盛瑞平张德学崔建明高键范学升隋荣全董雁飞
Owner SHANDONG UNIV OF SCI & TECH
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