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Dual-buffer mechanism based real-time system multi-task data sharing method

A double-buffering mechanism, real-time system technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve problems such as high resource consumption, lack of versatility and portability, changing task scheduling schemes, etc., to ensure the update rate. , the effect of good versatility and portability

Active Publication Date: 2016-08-31
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Purpose of the invention: In order to solve the problems of large resource consumption, possible change of task scheduling scheme, low data update efficiency, lack of versatility and portability in the prior art, the present invention provides a real-time system multi-task data sharing based on double buffering mechanism method, can efficiently complete the data sharing between multiple tasks in the VxWorks653 system partition, especially the situation where one task writes and multiple tasks read

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Embodiment Construction

[0029] The present invention will be further described in detail through specific embodiments below.

[0030] The present invention first designs a double buffer data structure, the double buffer data structure includes: a single buffer maximum value (number of bytes), a buffer A writable flag, a buffer B writable flag, a buffer writable Read flag, cache write times, cache A update flag, cache B update flag, read task update flag, cache A address, cache B address.

[0031] The double buffer data structure is used as the carrier of data sharing between tasks, figure 1 A memory model for double-buffered data structures. Take the C language implementation as an example, where:

[0032] 1) The maximum number of bytes that a single buffer can handle is hereinafter referred to as singleBufferSize, which is used as the basis for dynamically allocating memory to buffer areas A and B.

[0033] 2) Buffer A writable flag, hereinafter referred to as writeA, is used to judge whether the...

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Abstract

The invention discloses a dual-buffer mechanism based real-time system multi-task data sharing method. The method includes a dual-buffer structure initialization operation, a dual-buffer write-in operation, and a dual-buffer reading operation. The dual-buffer structure initialization operation performs initialization motion such as storage allocation and initial value setting on a dual-buffer structure. The dual-buffer reading operation is called by a reading task to perform data reading on the dual-buffer structure. The dual-buffer write-in operation is called by a write-in task to perform data write-in on the dual-buffer structure. Through the dual-buffer mechanism, an original system scheduling cannot be affected, the refresh rate of the written data can be ensured, the relative uniformity, the promptness and the non-repeatability of read data can be ensured.

Description

【Technical field】 [0001] The invention relates to a data sharing method among tasks of a real-time system, in particular to a data sharing method in which one task is written and multiple tasks are read in a partition based on the VxWorks653 system. 【Background technique】 [0002] The VxWorks653 system provides APEX Buffers (caching), Blackboards (blackboard), Semaphores (semaphore) and other methods for data communication between tasks (processes) within a partition. [0003] Buffers (caching) method: Buffer can be regarded as a message queue, first create a Buffer, set the depth of the message queue in the Buffer and the maximum number of bytes of a single message. Tasks (processes) communicate data through the message queue in a first-in-first-out or priority queuing mode (depending on the Buffer setting). Each time a message is written, the queue depth increases by one, and after the queue depth reaches the maximum value, it cannot be written. Each time a message is re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/0877G06F12/0893
CPCG06F12/0877G06F12/0893
Inventor 徐克张国全李奎
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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