Shift registering unit, and shift register and array substrate comprising same

Abstract

The invention discloses a shift registering unit, a shift register comprising the shift registering unit and an array substrate comprising the shift registering unit. An embodiment of the shift registering unit comprises a first capacitor, a second capacitor and a third capacitor which are connected in parallel, wherein the first capacitor, the second capacitor and the third capacitor are used for receiving electrical signals provided by a first bus; the first capacitor comprises a first electrode plate formed in a first conductor layer and a second electrode plate formed in a second conductor layer; the second capacitor comprises a third electrode plate formed in a third conductor layer and a fourth electrode plate formed in a fourth conductor layer; the third capacitor is composed of the second electrode plate and the third electrode plate; and the first bus is formed in the second conductor layer or the third conductor layer. According to the shift registering unit, the shift register and the array substrate, wiring area required by the shift registering unit can be reduced, thereby being conductive the implementation of narrow frame of a display panel.

Description

technical field [0001] The present disclosure generally relates to display technology, and more particularly, to a shift register unit, a shift register including the same, and an array substrate. Background technique [0002] In an existing liquid crystal display panel, a plurality of cascaded shift register units are usually used to realize the shift of the scanning signal, so as to drive each pixel row in the pixel array. [0003] The circuit of the shift register unit usually includes one or more capacitive elements to receive the electrical signal output by the bus. In addition, the shift register unit further includes a plurality of thin film transistors to generate scan signals for driving each pixel row in the pixel array based on received electrical signals of each bus line. [0004] Such as figure 1 As shown, it is a schematic diagram of the relative positional relationship of the bus 110 , the capacitive element 120 and the thin film transistor 130 in a conventi...

AI Technical Summary

Problems solved by technology

However, image 3 Among them, due to the existence of the hollow area 323 on the electrode plate of the capacitor, a larger wiring area is required under the premise of providing the same capacitor capacity, which is not conducive to narrowing the frame of the liquid crystal display panel.

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