A system and method for reducing power consumption of an operational amplifier in a pipeline

Abstract

The invention relates to a system and method for reducing power consumption of an operational amplifier of a pipelined analog-to-digital converter. The system comprises current source tubes M1, ... and Mn, two groups of switching units Kb1, ..., and Kbn and K1, ..., and Kn, a clock signal CK1 being a maintaining phase clock and a clock signal CK2 being a sampling phase clock, bias voltage supply modules VBIAS generating bias voltages Vb1, ... , and Vbn and bias voltages V1, ... and Vn, and a main body circuit OPAbody of an operational amplifier. The current source tubes M1, ... and Mn consist of constant-current-source tail tubes Ma1, ..., and Man and dynamic source tubes Mb1, ..., and Mbn, wherein the constant-current-source tail tubes and the dynamic source tubes are connected in parallel; and source terminals of the current source tubes M1, ... and Mn are connected with a power supply directly or are grounded directly. According to the invention, the provided system and method can be widely applied to any operational amplifier circuit of a pipelined analog-to-digital converter working at a certain frequency. The system and method have advantages of simple design, obvious power consumption reduction, and high universality.

Description

technical field [0001] The invention relates to a system and method for reducing power consumption in integrated circuit design, in particular to a system and method for reducing power consumption of operational amplifiers in pipelines. Background technique [0002] As an intermediate bridge circuit between the analog world and the digital world, the analog-to-digital converter is widely used in the communication field. With the increasing popularity of portable devices, it is required that the analog-to-digital converter has high speed and high precision, and can obtain lower power consumption at the same time. However, in order to obtain higher speed and accuracy, the power consumption of the analog-to-digital converter is often sacrificed as a price. High-speed and high-precision analog-to-digital converters usually adopt a pipeline structure. The pipelined analog-to-digital converter includes multiple low- and medium-precision sub-level conversion units. Under the clock...

AI Technical Summary

Problems solved by technology

However, in order to obtain higher speed and accuracy, the power consumption of the analog-to-digital converter is often sacrificed

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