FPGA-based BiSS-C communication protocol method

Abstract

Provided is an FPGA-based BiSS-C communication protocol method. The invention belongs to the technical field of transmission and communication between a sensor and a control card. The method comprises the following steps: step 1, clock signal MAs of an FPGA module are sent to a clock input end of an external grating sensor via an RS422 interface; step 2, the rising edges of the clock signal MAs trigger the external grating sensor to send data signals; step 3, the FPGA module judges whether the start position is at high level and the '0' position is at low level for each frame of data signal, the FPGA module waits for next frame of data if the start position is not at high level and the '0' position is not at low level for each frame of data signal, and the rising edge serial port of each clock MA receives one bit of data if the start position is at high level and the '0' position is at low level for each frame of data signal; step 4, a complete frame of data is stored in a dual-port RAM memory of the FPGA module; and step 5, the data in the dual-port RAM memory is transmitted to a DSP module in real time. The method belongs to the field of hardware decoding. Through FPGA decoding, two functions, namely, data communication and register, can be achieved. Communication can be completed, and data can be stored. The stored data is used to process other programs.

Description

technical field [0001] The invention belongs to the technical field of transmission and communication between sensors and control cards. Background technique [0002] The BiSS communication protocol is a full-duplex synchronous serial bus communication protocol, which is specially designed for real-time, two-way, high-speed sensor communication. It is compatible with the industry standard SSI (Synchronous Serial Interface Protocol) bus protocol in hardware. Its typical application It realizes communication between servo drive and encoder in the field of motion control, and has the characteristics of compatibility, low cost, and stability. The BiSS-C communication protocol is a one-way fast synchronous serial interface. FPGA is a field programmable logic device. The circuit design completed by hardware description language (Verilog or VHDL) can be quickly burned into FPGA for testing after simple synthesis and layout. It has the characteristics of strong flexibility. FPGA pr...

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Problems solved by technology

[0003] The purpose of this invention is to provide a kind of BiSS-C communication protocol method based on FPGA, in order to solve existing BiSS-C communication protocol to occupy resources in FPGA and the problem such as line delay processing, BiSS-C communication protocol is in FPGA resource number More than 1300 LEs are required, and each frame of data needs to be compensated for line delay once

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