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A scanning flip-flop circuit based on HP memristor and its design method

A technology of scanning triggers and memristors, applied in the direction of electric pulse generator circuits, etc., can solve the problems of damaged chips or test equipment, high power consumption, etc., and achieve the effect of reducing test power consumption

Inactive Publication Date: 2018-04-13
FUZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some working environments, the power consumption of some chips in the test working mode may be several times higher than that of the chips in the normal working mode, which may damage the chips or test equipment

Method used

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  • A scanning flip-flop circuit based on HP memristor and its design method
  • A scanning flip-flop circuit based on HP memristor and its design method
  • A scanning flip-flop circuit based on HP memristor and its design method

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Embodiment Construction

[0027] The technical solution of the present invention will be specifically described below in conjunction with the accompanying drawings.

[0028] The design process of the HP memristor-based scanning flip-flop circuit of the present invention is as follows,

[0029] Step S01: Using the existing CMOS master-slave flip-flop circuit technology; using the nano-scale memristive device announced by Hewlett-Packard in 2008, which has a power-off memory function, and its mathematical model is as follows:

[0030]

[0031]Among them, RMEM is the resistance value of the memristor, V(t) is the voltage across the memristor, w(t) represents the change of the width of the doped region with time, and D represents the total length of the doped region and the non-doped region , ROFF represents the resistance value of the memristor when the doped region is 0, RON represents the resistance value of the memristor when the non-doped region is 0, and the value of w(t) is automatically between ...

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Abstract

The invention relates to an HP memristor-based scan flip-flop circuit and a design method thereof. The scan flip-flop circuit comprises a master-slave flip-flop, an either-or data selector, a memory control module, a return control module and a memristor, wherein the master-slave flip-flop is respectively connected with the either-or data selector, the memory control module and the return control module; the memory control module and the return control module are also connected onto the memristor; the memory control module is used for controlling data of the master-slave flip-flop to be transmitted to the memristor; and the return control module is used for controlling data in the memristor to be returned to the master-slave flip-flop. Before the entire flip-flop is power-off, data stored in the master-slave flip-flop are stored in the memristor via the memory control module; and when the flip-flop is power-on again, the data stored in the memristor can be returned to the master-slave flip-flop via the return control circuit.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit design, and is a special flip-flop standard unit circuit, which is suitable for low power consumption design in integrated circuit scan chain technology, specifically a scanning flip-flop circuit based on HP memristor and its design method. Background technique [0002] Resistance, capacitance and inductance are the three basic devices of the circuit. In 1971, Prof. Leon Chua theoretically predicted the fourth basic device, which was named memristor. Hewlett-Packard sandwiched two nano-scale titanium dioxide films in two platinum sheets, one of which was doped with oxygen vacancies, which is equivalent to a semiconductor, and the other layer was not doped with oxygen vacancies, which was equivalent to an insulator. It announced its success in 2008. Nanoscale memristors were fabricated and experimentally demonstrated that the device has a memory function. According to the character...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K3/02
Inventor 陈传东王少昊陈群超江浩王仁平
Owner FUZHOU UNIV
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