Nuclear power station reactor protection system testing method and apparatus thereof
A technology for reactor protection and system testing, applied in the field of instrumentation and control of nuclear power plants, can solve problems such as nuclear power plant safety hazards and AV42 malfunctions
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Embodiment 1
[0027] figure 1 A flow chart of a test method for a nuclear power plant reactor protection system provided by the first embodiment of the present invention is shown, and the details are as follows:
[0028] Step S11, triggering the CPU is testing signal.
[0029] Specifically, an operation of triggering a central processing unit (Central Processing Unit, CPU) test signal may be executed by an execution logic unit (Actuator Logic Unit, ALU). In the TXS system (the power station control system with the highest processing security level of 1E), there are 7 priority levels for the CPU task processor, and running the T3 test script through the service terminal (Service Unit, SU) belongs to the service task of the CPU, and the priority level is the reciprocal Second, it is not a task that must be completed every processing cycle. For example, in each processing cycle, the service task is executed only when the CPU finishes processing the first 5 tasks. If the time after the first ...
Embodiment 2
[0050] image 3 A structural diagram of a test device for a nuclear power plant reactor protection system provided by the second embodiment of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown. In this embodiment, "first", "second" and "third" in "first pulse output module", "second pulse output module" and "third pulse output module" are only used to distinguish different "Pulse output module" has no other meaning. By analogy, the "first" and "second" in "first AND gate" and "second AND gate" are only used to distinguish different "AND gates" and have no other meaning.
[0051] The nuclear power plant reactor protection system test device includes: a CPU test module 31 , a binary test trigger module 32 , a blocking signal determination module 33 , an action signal determination module 34 , and a signal response module 35 . in:
[0052] The CPU testing module 31 is configured to tr...
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