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Address decoding method based on multi-valued logic circuit

A technology of address decoding and multi-value logic, which is applied in the field of address decoding for single access to multiple storage units, and can solve the problems of DNA uncontrollability and non-reusability

Inactive Publication Date: 2014-10-08
BEIJING UNIV OF POSTS & TELECOMM
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Problems solved by technology

[0006] As the carrier of information, DNA has a very large storage capacity and can generate multiple data at a time, but the DNA in the container is uncontrollable, and the DNA chain cannot be reused after use.

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  • Address decoding method based on multi-valued logic circuit
  • Address decoding method based on multi-valued logic circuit
  • Address decoding method based on multi-valued logic circuit

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Embodiment Construction

[0023] The address decoding method is responsible for selecting working units according to requirements, and unselected units do not work. In a traditional computer, the ground value decoder can only drive or access one storage unit for each decoding. However, the algorithm of molecular calculation requires the ability to select one or more units at a time, so a different address decoder is needed. The address decoding method in this system is realized by using the idea of ​​four-valued logic. For example, if a i0 = 1,a i1 =1, then CS(i)=1 (1≤i≤n), that is, all 2n storage units are selected, and so on, corresponding multiple storage units can be selected at one time as required.

[0024] A, T, G, and C in the coding of molecular computing can be simulated by four-valued logic such as φ, 0, 1, *, and four bases are equivalent to four states.

[0025] Four logic states of four-valued logic, φ indicates that none is selected, 0 indicates that unit 0 is selected, 1 indicates t...

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Abstract

The invention relates to an address decoding method based on a multi-valued logic circuit, in particular relates to an address decoding method for accessing a plurality of storage units once, and belongs to the technical field of digit circuits. The method is characterized in that 2n AND gates are adopted, and the created address decoding method is provided with 2n input ends; 2n address signals of storage units to be selected are respectively sent to the 2n input ends of the address decoding method; the 2n AND gates of the address decoding method are respectively subjected to AND operation; the corresponding storage unit can be selected as result is equal to 1, and thus the corresponding read and write circuit can be driven. The method has the advantages that multi-valued addressing is realized, the storage data can be read and written at the same time, the novel storage or processing devices apply, and parallel processing of data is supported.

Description

technical field [0001] The invention relates to an address decoding method based on a multi-valued logic circuit, in particular to an address decoding method for single access to multiple storage units, belonging to the technical field of digital circuits. Background technique [0002] The working principle of the address decoding method is similar to that of molecular computing. Molecular computing uses DNA encoded by bases (A, T, C, G) as "data", DNA biochemical reactions as "operations", DNA before the reaction as the "input" of the problem, and DNA after the reaction as the "output". After polynomial time "operation", the "answer" is finally obtained and read out. [0003] Molecular computing is a space-based processing model, which can generate, process and store exponential data at the same time through efficient information encoding and huge parallel storage and processing systems, and realize exponentially accelerated calculation and time-space complexity conversion...

Claims

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Application Information

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IPC IPC(8): G06F13/40
Inventor 余文宁建国李艳梅马天宝任会兰姚文斌
Owner BEIJING UNIV OF POSTS & TELECOMM
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