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Dynamic reconfigurable embedded system based on ARM and FPGA

An embedded system and dynamic technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve the problems of poor scalability, low efficiency, inconvenience, etc., to improve reusability, improve efficiency, Easily Portable Effects

Inactive Publication Date: 2014-08-20
SYSU CMU SHUNDE INT JOINT RES INST +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the software part and the hardware part of the existing ARM-based and FPGA-based embedded systems are often too tightly combined and not transparent to each other, making the software-hardware joint development and testing process for applications based on such systems cumbersome and complex, and the efficiency is low. Low, poor scalability, porting to a new hardware platform requires a lot of modification of software code and hardware code, low code reuse rate
In addition, the existing embedded systems based on ARM and FPGA cannot be reconstructed when the system is online. If the requirements change during actual use, it needs to be disassembled to upgrade, which is very inconvenient.

Method used

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  • Dynamic reconfigurable embedded system based on ARM and FPGA

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Embodiment Construction

[0016] The present invention will be further described below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0017] Such as figure 1 As shown, the present embodiment is made up of ARM subsystem and FPGA subsystem; ARM subsystem part is made up of ARM microprocessor, ARM power supply circuit, ARM reset circuit, ARM clock circuit, ARM memory and other ARM peripherals that can be tailored; The FPGA subsystem part is composed of FPGA, FPGA download circuit, FPGA clock circuit, FPGA reset circuit, FPGA power supply and other tailorable FPGA peripherals; the two subsystems are interconnected by one or more, one or more buses, Realize the transmission of various signals such as control signals and data signals.

[0018] The ARM processor and FPGA used in this embodiment are the XC7Z020 of Xilinx Company, which consists of an ARM Cortex TM -A9MPCore processor, that is, the PS part and a 28nm low-power programmabl...

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Abstract

The invention discloses a dynamic reconfigurable embedded system based on an ARM and an FPGA. The dynamic reconfigurable embedded system is mainly composed of an ARM subsystem and an FPGA subsystem, wherein the two subsystems are connected through one or one buses to achieve switching between data signals and control signals, the ARM subsystem can reconfigure the FPGA subsystem through one reconfiguration module on line, and dynamic reconfiguration of the system is achieved. According to the system, due to the fact that an advanced operating system Linux and the buses are used as middleware, the software part and the hardware part designed by applications of the embedded system based on the ARM and the FPGA are abstracted and separated, the software and hardware combination development and debugging efficiency of the system is improved, the applications can be transplanted easily, and the reuse rate of codes of the applications is increased.

Description

technical field [0001] The invention relates to the embedded field, more specifically, to a dynamically reconfigurable embedded system based on ARM and FPGA. Background technique [0002] The embedded system using ARM processor and FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) combines the advantages of both, and it is more and more widely used in communication, network, multimedia, aviation and other fields. However, the software part and the hardware part of the existing ARM-based and FPGA-based embedded systems are often too tightly combined and not transparent to each other, which makes the software-hardware joint development and testing process for applications based on such systems cumbersome and complicated, and the efficiency is low. Low, the scalability is not strong, when transplanting to a new hardware platform, a large number of software codes and hardware codes need to be modified, and the code reuse rate is low. In addition, the existing ...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 黄以华韦铭
Owner SYSU CMU SHUNDE INT JOINT RES INST
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