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Oversampling 64-time sigma-delta modulation circuit with effective bit being 18

A technology of modulation circuit and sample-and-hold circuit, which is applied in the direction of electrical components, analog conversion, code conversion, etc., can solve the problems of stability, problems, and high signal-to-noise ratio of the same, to ensure stability, reduce occupied area, The effect of high signal-to-noise ratio

Inactive Publication Date: 2014-07-23
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There are two commonly used structures for ∑-△ modulators: a single-loop high-order structure and a multi-stage noise shaping (Multi-stage Noise Shaping, MASH) structure. The former is easy to implement, but there are stability problems. The usual method for considering stability design is, Before the signal is input into the quantization truncator, limit the signal to prevent the loop from entering an unstable state due to excessive signal amplitude.
The MASH structure is composed of first-order and second-order sigma-delta modulator subunits in series, and there is no stability problem, but a higher order is required to achieve the same signal-to-noise ratio

Method used

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  • Oversampling 64-time sigma-delta modulation circuit with effective bit being 18
  • Oversampling 64-time sigma-delta modulation circuit with effective bit being 18
  • Oversampling 64-time sigma-delta modulation circuit with effective bit being 18

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Embodiment Construction

[0016] see figure 1 , 2 , 3, and 4, the present invention provides a sigma-delta modulation circuit with 64 times the effective number of oversampling and 18 bits, including:

[0017] An interpolation filter 10 is used to carry out oversampling interpolation and filtering of the digital input signal, and the interpolation filter 10 includes a half-band filter 11, a CIC filter 12 and a sample-and-hold circuit 13 connected in sequence, respectively realizing 2 , 8, 4 times of interpolation, the half-band filter 11 is in the lowest sampling rate part in the circuit, the transition band is 0.4fs~0.6fs, the stop band attenuation is greater than 75dB, by a 38-order half-band FIR filter Realize, the input of described CIC filter 12 is the output of half-band filter 11, digital signal is carried out 8 times of interpolation filtering through 3 stages of combs, 8 times of interpolators and 3 stages of integrators, and the output receives sampling A holding circuit 13, the sample and ...

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Abstract

The invention provides an oversampling 64-time sigma-delta modulation circuit with an effective bit being 18. The circuit comprises an interpolation filter and a sigma-delta modulator. The interpolation filter is used for conducting oversampling interpolation and filtering on digital input signals. The input end of the sigma-delta modulator is connected with the output end of the interpolation filter, the sigma-delta modulator is used for modulating oversampled digital signals, shaping quantized noise introduced by a quantizer, moving noise in the signal bandwidth out of the bandwidth, and meanwhile guaranteeing that transmission of the signals is not affected, and output 1-bit 0 / 1 code streams need to be restored through a backward-stage analog reconstruction filter so as to acquire analog signals. An improved structure is adopted in a half-band filter in the interpolation filter so that the area of the half-band filter can be greatly reduced; for the sigma-delta modulator, a monocycle high-order structure easier to achieve is adopted, the stability problem is analyzed, the high signal to noise ratio is achieved, and meanwhile stability of the modulator is guaranteed.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a sigma-delta modulation circuit with 64-fold oversampling and an effective number of 18 bits used in wireless communication. Background technique [0002] Digital-to-analog converter (Digital to Analog Converter, DAC), as an interface for digital signal and analog signal conversion, has been a research hotspot for many years. Different from the traditional Nyquist rate DAC, Σ-ΔDAC adopts oversampling technology, which averages the quantization noise into a wider frequency band by increasing the sampling frequency, and pushes the quantization noise to the high frequency band through noise shaping technology, so that the signal The noise power in the band is greatly reduced, which can effectively improve the signal-to-noise ratio. The interpolation filter in the ∑-△DAC upsamples the input signal while increasing the image frequency of the signal, which reduces the dif...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M3/00
Inventor 杜兴马波袁凌曹晓东石寅
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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