The realization method of aerospace fpga general refresh circuit based on selectmap

Abstract

The invention relates to an astronavigation FPGA universal refresh circuit based on SELECTMAP. The refresh circuit is provided with six input pins, six output pins and eight double-direction pins, and the input pins, the output pins and the double-direction pins are connected with pins of a PROM and pins of an FPGA. The SRAM-type FPGA is subjected to backward reading operation through SELECTMAP, the type of the FPGA is determined, and backward read data are checked; if errors happen, a code stream is read from a correct data source, effective parts are intercepted from the code stream, the effective code stream is written into an inner configuration bit of the FPGA again through SELECTMAP, and accordingly refreshing of a configuration memory is completed. Through the refresh circuit, single event upset of the astronavigation FPGA can be timely detected and corrected, functional faults caused by single event upset of the astronavigation FPGA are eliminated, and astronavigation FPGA space application reliability is improved.

Description

Technical field [0001] The invention relates to a SELECTMAP-based aerospace FPGA general refresh circuit and an implementation method thereof, and is particularly used for detecting and recovering a space single event flip failure of an SRAM FPGA for aerospace, belonging to the technical field of integrated circuits. Background technique [0002] The basic structure of SRAM FPGA Figure 5 , The main functional modules include: input and output modules (IOB) in a circle around, two rows of block memory (Block RAM), internal programmable logic block array (CLB), in addition to this, there are also connections throughout the circuit The interconnection resources of each module. The above-mentioned logic resources and interconnection resources are all controlled by the lower-level SRAM configuration bits. A large number of SRAM configuration bits distributed throughout the FPGA circuit determine the specific functions of the FPGA circuit, and the bit stream set of these configuration...

AI Technical Summary

Problems solved by technology

This effect is the spatial single event flipping effect. The flipping of the configuration bit state may lead to serious functional failures, resulting in internal functional disorder, short circuit, open circuit, etc.

Faults caused by this configuration bit flip are permanent and can only be removed by reloading the bitstream

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