A debug display and control system for radar information processor

Abstract

The invention provides a debugging and display controlling system of a radar information processor. The debugging and display controlling system comprises a high-speed data transmission module, a display control module and a resident monitoring module, wherein the resident monitoring module is mounted on the radar information processor; the display control module is used for receiving external input task requirements and sending corresponding control commands, the control commands are transmitted to the resident monitoring module through the high-speed data transmission module, and the resident monitoring module responds to the control commands, carries out corresponding operations on the radar information processor and uploads operation results to the display control module through the high-speed data transmission module. According to the debugging and display controlling system, the coherence debugging and display controlling for the radar information processor can be realized, the real-time performance and coherence of the radar information processor are verified, and the test efficiency of the radar information processor is increased.

Description

technical field [0001] The invention belongs to the technical field of radar information processing, and relates to auxiliary application equipment for a radar information processor. Background technique [0002] There are two main debugging methods for the existing radar information processor. One is based on the hardware emulator mode, which uses the hardware emulator to communicate with the radar information processor. The internal state of the radar information processor is displayed on the computer terminal through the hardware emulator. This method is mainly used in the development and debugging stage of the hardware circuit of the radar information processor. In the algorithm software debugging stage after the hardware circuit development and debugging stage of the radar information processor, the hardware emulator needs to suspend the operation of the radar information processor program in order to observe the internal state of the processor, and cannot debug the ope...

AI Technical Summary

Problems solved by technology

However, the communication rate of this mode is generally relatively low, and it cannot display internal variables, intermediate states, and target echoes with a large amount of data generated during the execution of the radar information processor's operating program.

For debuggers, the information provided by the flight control serial port adapter is not sufficient to locate the problem

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