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Method for performing high-speed communication by accessing SDRAM (synchronous dynamic random access memory) at different time intervals on basis of FPGA (field programmable gate array) and DSP (digital signal processor)

A high-speed communication, time-based technology, used in instruments, electrical digital data processing, etc.

Inactive Publication Date: 2014-03-19
GUANGDONG UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The invention solves the storage problem of stable and high-speed transmission of large-capacity data and DSP data between FPGA and DSP, and at the same time greatly reduces the cost of storage resources

Method used

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  • Method for performing high-speed communication by accessing SDRAM (synchronous dynamic random access memory) at different time intervals on basis of FPGA (field programmable gate array) and DSP (digital signal processor)
  • Method for performing high-speed communication by accessing SDRAM (synchronous dynamic random access memory) at different time intervals on basis of FPGA (field programmable gate array) and DSP (digital signal processor)

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Embodiment Construction

[0022] The method for high-speed communication between FPGA and DSP of the present invention by accessing SDRAM in different periods will be further described below in conjunction with the accompanying drawings and specific implementation methods.

[0023] The present invention is based on the method for FPGA and DSP to access SDRAM by time division for high-speed communication, and the system based on FPGA and DSP to access SDRAM by time division to perform high-speed communication includes FPGA, DSP, communication intermediary memory SDRAM, based on FPGA and DSP through time division access The method for high-speed communication of SDRAM is: the state switching switch in FPGA realizes the two states of FPGA and DSP accessing SDRAM; and the state switching switch in FPGA directly reads data from the communication intermediary memory SDRAM through the communication interface module for processing.

[0024] In the specific implementation method, what FPGA adopts is Cyclone II...

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Abstract

The invention relates to a method for performing high-speed communication by accessing an SDRAM (synchronous dynamic random access memory) at different time intervals on the basis of an FPGA (field programmable gate array) and a DSP (digital signal processor). A system for performing high-speed communication by accessing the SDRAM at different time intervals on the basis of the FPGA and the DSP comprises the FPGA, the DSP and a communication intermediary memory SDRAM. The method for performing high-speed communication by accessing the SDRAM at different time intervals on the basis of the FPGA and the DSP is as follows: a status switching switch in the FPGA is used for realizing two states for accessing the SDRAM by the FPGA and the DSP and directly reads data from the communication intermediary memory SDRAM through a communication interface module for processing. If SDRAM data are required to be read for processing, both the FPGA and the DSP can directly read the data from the communication intermediary memory SDRAM, so that additional memory time and resources are greatly saved, high-speed communication of the data is realized, and the cost of storage resources is greatly reduced simultaneously.

Description

technical field [0001] The invention relates to the field of high-speed transmission and communication of a large amount of data, in particular to a method for high-speed communication based on FPGA and DSP accessing SDRAM by time intervals, and is especially suitable for the field of high-speed transmission and communication of image data between DSP and PFGA. Background technique [0002] With the mature development of data signals and the increase of demand for image processing, the dependence on DSP technology is getting higher and higher. However, a single chip for high-speed image acquisition and high-speed image processing cannot meet the high-speed requirements. Therefore, in recent years, in terms of high-speed image acquisition and high-speed digital signal processing, more and more people have adopted the way of FPGA and DSP to work together. [0003] The Chinese invention patent with application number 201010590964.8 discloses a method and device for FPGA to com...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
Inventor 王晗陈新陈新度刘强
Owner GUANGDONG UNIV OF TECH
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