Allocation method and device of write combine attribute memory space

Abstract

The embodiment of the invention discloses an allocation method and an allocation device of a write combine attribute memory space. The allocation method comprises the following steps of: during resource scanning of equipment, determining types and sizes of resources required by each set of equipment; after the resource scanning of all equipment, determining the total size of a write combine memory space required by all first equipment; determining an initial address used for allocating the write combine memory space to the first equipment; and jointly allocating a memory space to all first equipment and allocating a sub memory space to each first equipment from the memory space. By using the allocation method and the allocation device of the write combine attribute memory space provided by the embodiment of the invention, the write combine attribute memory space can be more reliably allocated to the equipment and the allocation method is relatively simple.

Description

technical field [0001] The present invention relates to the field of communications, in particular to a method and device for allocating write combine (WC, Write Combine) attribute memory space. Background technique [0002] Peripheral Component Interconnect Express (PCIe, Peripheral Component Interconnect Express) bus technology, as a solution for device interconnection in a system, has become very popular. PCIe bus technology has the characteristics of high performance, low latency, low power consumption, good scalability, and strong anti-interference ability. The current standard has evolved to PCIExpress V3.0, with a bus frequency of up to 8.0G and a data bit width of 32 lanes. , can provide up to 8.0*32*2=512Gbps transmission bandwidth. In view of the advantages of PCIe transmission, it has been applied to the interconnection between systems, and the non-transparent bridge (NTB, None transparent Bridge) technology has been derived. [0003] see figure 1 , is a struct...

AI Technical Summary

Problems solved by technology

[0016] However, modifying the MTRR attribute table must follow the rules that the memory size must be strictly an integer power of 2, and the memory start address must be aligned according to the memory size boundary. As a result, when adding a write-combining attribute to the memory space of a certain device, the memory may be destroyed. The starting address and memory size of other memory spaces after the space, so the subsequent memory spaces have to be re-divided

However, the subsequent memory space reallocation algorithm is complex and difficult to implement; moreover, it is not always possible to find a subsequent memory space reallocation method that satisfies the above rules. Therefore, the method of manually modifying the device memory space to write merge attributes is not reliable.

Images