CMOS (complementary metal-oxide-semiconductor transistor) image sensor pixel and control time sequence thereof

An image sensor and pixel technology, used in image communication, radiation control devices, electrical solid-state devices, etc., can solve the problems of low aperture ratio of metal windows, low sensitivity, and insufficient information, so as to improve light efficiency and image quality. , the effect of improving sensitivity

Active Publication Date: 2014-09-24
BEIJING SUPERPIX MICRO TECHNOLOGY CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Due to the small photosensitive area and low sensitivity of the small pixel sensor, the information transmitted in dark light is not clear enough
Especially when the first layer of metal, the second layer of metal and the third layer of metal are used as the device interconnection lines, the dielectric height on the surface of the photodiode Si (silicon) is relatively high, and multiple lines between adjacent rows and adjacent columns of pixels The metal connection leads to a low opening ratio of the metal window, which blocks part of the light from entering the photodiode

Method used

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  • CMOS (complementary metal-oxide-semiconductor transistor) image sensor pixel and control time sequence thereof
  • CMOS (complementary metal-oxide-semiconductor transistor) image sensor pixel and control time sequence thereof
  • CMOS (complementary metal-oxide-semiconductor transistor) image sensor pixel and control time sequence thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0052] like figure 1 As shown, the CMOS image sensor pixel adopts 4T2S structure, including four pixels, the photodiodes of pixel 01, pixel 11, pixel 12 and pixel 22 are PD01, PD11, PD12, PD22 respectively; TX01 and TX11 are pixel 01 and pixel 11 respectively TX12 and TX22 are the charge transfer transistors of pixel 12 and pixel 22 respectively; SX1, SF1 and RX1 are the select transistors, source follower transistors and reset transistors of pixel 01 and pixel 11 respectively; SX2, SF2 and RX2 are respectively Select transistors, source follower transistors and reset transistors of pixels 12 and 22 . Pixel 01 and pixel 11 share transistors SX1, SF1, RX1 and floating active area FD1 (Floating Diffusion), and pixel 12 and pixel 22 share transistors SX2, SF2, RX2 and floating active area FD2; shared pixel 01 and pixel 11 and the shared pixels 12 and 22 form a mutually interlaced structure in the horizontal direction.

[0053] The metal interconnection lines used by CMOS image ...

Embodiment 2

[0056] like image 3 As shown, it is a schematic diagram of a 6X4 pixel array layout; image 3 The circuit schematic diagram corresponding to the schematic diagram of the pixel array layout is as follows: Figure 4 shown.

[0057] image 3 and Figure 4 In the pixel array shown, the FD area of ​​each pixel is connected to the gate of each corresponding source-following transistor with the first-layer metal connection, the power supply Vdd line uses the first-layer metal connection; the SC0-SC5 lines are the first-layer metal connection, The signal output line and the timing control line of the column controller are respectively connected to the source of the source follower transistor and the gate of the reset transistor of the pixel corresponding to the column. The second-layer metal connections S1 - S4 are respectively connected to the gates of the select transistors corresponding to the rows of pixels, and the second-layer metal connections T1 - T4 are respectively conn...

Embodiment 3

[0059] The details of CMOS image sensor pixel array signal acquisition are expressed as follows:

[0060] Figure 5 Shown is a schematic diagram of a pixel array with a row decoder and a column controller. The row decoder is placed on the left side of the pixel array (or on the right side of the array), the column controller is placed on the top of the pixel array (or on the bottom of the array), and the signal readout device is placed on the side of the pixel array. Bottom: The positions of the decoder, controller and signal readout device are not the only method of the present invention, and can also be adjusted according to the specific design and layout of the chip. Figure 5 In the schematic diagram shown, the specific positions of the array pixels are marked in detail, and the specific numbers of the timing output control lines of the decoder and the timing control lines of the column controller are also marked in detail. m and n are non-negative integers, which repres...

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Abstract

The invention discloses a CMOS image sensor pixel and its control timing. CMOS image sensor pixels include 4 pixels arranged in a 2×2 pixel array structure as a group of pixel units, where the two pixels in the first column and the second column share the selection transistor, source follower transistor, and reset transistor in the column respectively and the floating active area, and the first row of pixels and the second row of pixels form a staggered arrangement structure; multiple groups of pixel units are arranged vertically and horizontally to form a two-dimensional pixel array. In the pixel array, the first layer of metal wiring is the power supply control line and the signal output line is also the timing control line of the column controller, and the second layer of metal wiring is the timing output control line of the row decoder. The pixel structure array of the present invention can improve the light utilization efficiency of the small-area pixel sensor, thereby improving the sensitivity, and can effectively improve the image quality of the small-area pixel image sensor.

Description

technical field [0001] The invention relates to a CMOS image sensor, in particular to a CMOS image sensor pixel and its control timing. Background technique [0002] Image sensors are already widely used in digital cameras, mobile phones, medical devices, automobiles and other applications. In particular, the rapid development of CMOS (Complementary Metal Oxide Semiconductor) image sensors has made people have higher requirements for low power consumption, small size, and high resolution image sensors. [0003] The pixel structure arrangement of CMOS image sensors in the prior art takes 4T2S as an example. Because it depends on the structural characteristics of the pixel itself, its array generally requires the first layer of metal, the second layer of metal and the third layer of metal as device interconnections. Multiple rows or columns of first-layer metal, second-layer metal or third-layer metal wiring are required between adjacent rows of pixels or adjacent columns of ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/341H04N5/3745H01L27/146
CPCH01L27/14603H04N5/3765H01L27/14641H04N25/745H04N25/766H04N25/75
Inventor 郭同辉旷章曲陈杰刘志碧唐冕赵建波
Owner BEIJING SUPERPIX MICRO TECHNOLOGY CO LTD
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