PCI (Peripheral Component Interconnect) interface and data transmission method thereof under FPGA (Filed-Programmable Gate Array) environment

A data transmission method and multi-purpose technology, applied in the multi-purpose PCI interface and its data transmission field in the FPGA environment, can solve the problems of rising development cost of purchasing chips, long development time period, complicated user interface, etc., so as to reduce the difficulty of design logic , the effect of reducing design complexity and simplifying control logic complexity

Inactive Publication Date: 2011-11-23
UNIV OF JINAN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The former method needs to redesign the entire PCI interface, and requires a deep understanding and grasp of the PCI interface protocol. The development time cycle is long and difficult; the latter method has improved the development cycle and difficulty, but the cost of purchasing chips is still It will increase the development cost, and the user interface it provides will still be a bit complicated, of course, this is at the expense of relatively high flexibility

Method used

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  • PCI (Peripheral Component Interconnect) interface and data transmission method thereof under FPGA (Filed-Programmable Gate Array) environment
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  • PCI (Peripheral Component Interconnect) interface and data transmission method thereof under FPGA (Filed-Programmable Gate Array) environment

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Experimental program
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Embodiment Construction

[0043] Refer to the attached figure 1 Multi-purpose PCI interface in FPGA environment, which includes:

[0044] A register is used to temporarily store the interrupt status, address, command and data of the device of the PCI interface;

[0045]The slave device module is connected to the register, and accepts and parses instructions from the upper host or DMA to read and write information stored in the register; and

[0046] The main device module is connected to the register, and is connected with a FIFO read-write interface for connecting to the user end, and is used to complete the DMA interrupt request and data transmission according to the interrupt status, address and command contained in the information read and written from the slave device module , and returns the transfer size and address in the register.

[0047] The PCI standard protocol on which this solution is based is a standard protocol widely adopted by the industry. Its protocol supports both bus frequenci...

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Abstract

The invention discloses a multipurpose PCI interface and the data transmission method thereof under an FPGA environment. A method for implementing the PCI interface with the DMA (Direct Memory Access) function is adopted, and the interface is independently implemented through a PCI master device module, a PCI slave device module and a PCI register module. A simple FIFO (First Input First Output) interface easy to implement is adopted and used for a PCI user-side interface, DMA control details are concealed from a user, and the design complexity of the user interface is reduced. In high-capacity data transmission, data are encapsulated according to a data format required by the interface and can be realized in a DMA way by being simply written into FIFO, the control logic complexity is simplified, and the efficiency of development of the user interface is improved.

Description

technical field [0001] The invention relates to a multi-purpose PCI interface under FPGA environment and a data transmission method based on the interface. FPGA is an abbreviation of Field-Programmable Gate Array, that is, Field Programmable Gate Array. Background technique [0002] PCI (Peripheral Component Interconnect) is a bus structure introduced by SIG (Special Interest Group). Since 1992, Intel, HP, IBM, Apple, DEC, Compaq, NEC and other well-known manufacturers joined in and reorganized. The 32-bit PCI bus appeared as a substitute for the low-speed bus used by PCs such as ISA / EISA. The reason why it has become the mainstream of the local bus is determined by some remarkable characteristics it has. details as follows: [0003] (1) High transmission efficiency and good scalability [0004] The typical operating frequency of the PCI bus is 33MHz and supports 66MHz expansion. It has a bus width of 32 bits and can be extended to 64 bits. When many peripherals are con...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
Inventor 杨波孙涛陈贞翔林金
Owner UNIV OF JINAN
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